Datasheet

PCM1795
www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009
REV: Output Phase Reversal
This bit is available for read and write.
Default value: 0
REV Output Setting
REV = 0 Normal output (default)
REV = 1 Inverted output
The REV bit is used to invert the output phase for both channels.
ATS[1:0]: Attenuation Rate Select
These bits are available for read and write.
Default value: 00
ATS[1:0] Attenuation Rate Selection
00 Every LRCK (default)
01 LRCK/2
10 LRCK/4
11 LRCK/8
The ATS[1:0] bits are used to select the rate at which the attenuator is decremented/incremented during level
transitions.
OPE: DAC Operation Control
This bit is available for read and write.
Default value: 0
OPE DAC Operation Control
OPE = 0 DAC operation enabled (default)
OPE = 1 DAC operation disabled
The OPE bit is used to enable or disable the analog output for both channels. Disabling the analog outputs
forces them to the bipolar zero level (BPZ) even if audio data are present on the input.
DFMS: Stereo DF Bypass Mode Select
This bit is available for read and write.
Default value: 0
DFMS Mode Selection
DFMS = 0 Monaural (default)
DFMS = 1 Stereo input enabled
The DFMS bit is used to enable stereo operation in DF bypass mode. In the DF bypass mode, when DFMS is
set to '0', the pin for the input data are DATA (pin 5) only; therefore, the PCM1795 operates as a monaural DAC.
When DFMS is set to '1', the PCM1795 can operate as a stereo DAC with inputs of the left channel and right
channel data on ZEROL (pin 1) and ZEROR (pin 2), respectively.
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Product Folder Link(s): PCM1795