Datasheet

t
(MCH)
1.4V
MS
t
(MSS)
LSB
1.4V
1.4V
t
(MCL)
t
(MCY)
t
(MDS)
MC
MDI
t
(MOS)
50%ofV
DD
MDO
t
(MHH)
t
(MSH)
t
(MDH)
I
2
C INTERFACE
PCM1795
www.ti.com ........................................................................................................................................................................................................ SLES248 – MAY 2009
Figure 43. Control Interface Timing
Timing Characteristics for Figure 43
PARAMETER MIN MAX UNIT
t
(MCY)
MC pulse cycle time 100 ns
t
(MCL)
MC low-level time 40 ns
t
(MCH)
MC high-level time 40 ns
t
(MHH)
MS high-level time 80 ns
t
(MSS)
MS falling edge to MC rising edge 15 ns
t
(MSH)
MS hold time
(1)
15 ns
t
(MDH)
MDI hold time 15 ns
t
(MDS)
MDI setup time 15 ns
t
(MOS)
MC falling edge to MDO stable 30 ns
(1) MC rising edge for LSB to MS rising edge.
The PCM1795 supports the I
2
C serial bus and the data transmission protocol for standard and fast mode as a
slave device. This protocol is explained in the I
2
C specification 2.0.
In I
2
C mode, the control terminals are changed as described in Table 7 .
Table 7. Control Terminals
TERMINAL NAME TDMCA NAME PROPERTY DESCRIPTION
MS ADR0 Input I
2
C address 0
MDI ADR1 Input I
2
C address 1
MC SCL Input I
2
C clock
MDO SDA Input/output I
2
C data
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