Datasheet

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SLES105B − FEBRUARY 2004 − REVISED NOVEMBER 2006
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55
THEORY OF OPERATION
Analog OutputDigital Input
24 Bits
8 f
S
MSB
and
Lower 18 Bits
Upper
6 Bits
ICOB
Decoder
3
rd
-Order
5-Level
Sigma-Delta
Advanced
DWA
Current
Segment
DAC
0–4
Level
0–62
Level
0–66
Figure 65. Advanced Segments DAC
The PCM1792A uses TI’s advanced segment DAC architecture to achieve excellent dynamic performance and
improved tolerance to clock jitter. The PCM1792A provides balanced current outputs.
Digital input data via the digital filter is separated into six upper bits and 18 lower bits. The six upper bits are
converted to inverted complementary offset binary (ICOB) code. The lower 18 bits, associated with the MSB,
are processed by a five-level third-order delta-sigma modulator operated at 64 f
S
by default. The 1 level of the
modulator is equivalent to the 1 LSB of the ICOB code converter. The data groups processed in the ICOB
converter and third-order delta-sigma modulator are summed together to an up to 66-level digital code, and then
processed by data-weighted averaging (DWA) to reduce the noise produced by element mismatch. The data
of up to 66 levels from the DWA is converted to an analog output in the differential-current segment section.
This architecture has overcome the various drawbacks of conventional multibit processing and also achieves
excellent dynamic performance.