Datasheet

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APPLICATION INFORMATION
Connection Diagrams
ZEROL/NA
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
MS
MC
MD
SCK
DATA
BCK
LRCK
ZEROR/ZEROA
NC
V
OUT
L
V
OUT
R
V
COM
AGND
NC
V
CC
PCM1780
PCM1782
Mode Control
L-Ch OUT
R
4
R
3
R
2
R
1
PCM Audio Data
System Clock
Zero Mute Control
+
Post LPF
C
4
R-Ch OUT
+
Post LPF
C
3
+
C
2
0 V
5 V
+
C
1
FMT
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
DEMP0
DEMP1
MUTE
SCK
DATA
BCK
LRCK
ZEROA
TEST
V
OUT
L
V
OUT
R
V
COM
AGND
NC
V
CC
PCM1781
De-Emphasis
L-Ch OUT
R
4
R
3
R
2
R
1
PCM Audio Data
System Clock
Zero Mute Control
+
Post LPF
C
4
R-Ch OUT
+
Post LPF
C
3
+
C
2
0 V
5 V
+
C
1
S0055-01
Format
Mute
C
1
: 0.1-µF Ceramic and 10-µF Electrolytic
C
2
: 10-µF Electrolytic
C
3
, C
4
: 4.7-µF to 10-µF Electrolytic
R
1
−R
4
: 22 Ω to 100 Ω
PCM1780 , PCM1781 , PCM1782
SLES132B – MARCH 2005 – REVISED AUGUST 2006
A basic connection diagram is shown in Figure 28 , with the necessary power supply bypassing and decoupling
components. TI recommends using the component values shown in Figure 28 for all designs.
The use of series resistors (22 Ω to 100 Ω ) is recommended for the SCK, LRCK, BCK, and DATA inputs. The
series resistor combines with the stray PCB and device input capacitance to form a low-pass filter which reduces
high-frequency noise emissions and helps to dampen glitches and ringing present on clock and data lines.
Figure 28. Basic Connection Diagram
26
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