Datasheet

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PCM1774

SLAS551 – JULY 2007

MBST: BCK Output Configuration in Master Mode

Default value: 0

This bit is used to control the BCK output configuration in master mode. In master mode, this bit sets the BCK

output configuration to normal mode or burst mode. In normal mode (MBST = 0), the BCK clock runs

continuously. In burst mode (MBST = 1), the BCK clock runs intermittently, and the number of clock cycles per

LRCK period is reduced to equal the number of bits of audio data being transmitted. Operating in burst mode

reduces the power consumption of V

(I/O cell power supply). This is effective in master mode (register 69

MSTR = 1).

MBST = 0 Normal mode (default)

MBST = 1 Burst mode

ZCRS: Zero-Cross for Digital Attenuation/Mute and Analog Gain Setting

Default value: 0

This bit is used to enable the zero-cross detector, which reduces zipper noise while the digital soft mute, digital

attenuation analog gain setting, or analog volume setting is being changed. If no zero-cross data is input for a

512/f

period (10.6 ms at a 48-kHz sampling rate), then a time-out occurs and the PCM1774 starts changing the

attenuation, gain, or volume level. The zero-cross detector cannot be used with continuous-zero and dc data.

ZCRS = 0 Zero-cross disabled (default)

ZCRS = 1 Zero-cross enabled

B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

IDX[6:0]: 101 0111b (57h): Register 87

AIL0: AIN1L Selector (MUX1)

Default value: 0

This bit is used to select the analog input, AIN1L.

AIL0 AIN L-channel Select

0 Disconnect (default)

1 AIN1L

AIR0: AIN1R Selector (MUX2)

Default value: 0

This bit is used to select one of the three stereo analog inputs, AIN1R.

AIR0 AIN R-channel Select

0 Disconnect (default)

1 AIN1R

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