Datasheet

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PCM1774
SLAS551 – JULY 2007
Register 82
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Register 82 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 RSV RSV PAIR PAIL RSV RSV RSV RSV
IDX[6:0]: 101 0010b (52h): Register 82
PAIR: Power Up/Down for PG2 and PG6 (Gain Amplifier for R-Channel Analog Input)
PAIL: Power Up/Down for PG1 and PG5 (Gain Amplifier for L-Channel Analog Input)
Default value: 0
These bits are used to control power up/down for PG2 and PG6 (gain amplifier for analog input).
PAIR, PAIL = 0 Power down (default)
PAIR, PAIL = 1 Power up
Registers 84–86
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
Register 84 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 RSV RSV RSV RSV RSV MSTR RSV BIT0
Register 85 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 SRST LRPC NPR5 NPR4 NPR3 NPR2 NPR1 NPR0
Register 86 0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 MBST MSR2 MSR1 MSR0 RSV RSV RSV ZCRS
IDX[6:0]: 101 0100b (54h): Register 84
IDX[6:0]: 101 0101b (55h): Register 85
IDX[6:0]: 101 0110b (56h): Register 86
MSTR: Master or Slave Selection for Audio Interface
Default value: 0
This bit is used to select either master or slave mode for the audio interface. In master mode, the PCM1774
generates LRCK and BCK from the system clock. In slave mode, it receives LRCK and BCK from another
device.
MSTR = 0 Slave interface (default)
MSTR = 1 Master interface
BIT0: Bit Length Selection for Audio Interface
Default value: 1
This bit is used to select the data bit length for DAC input.
BIT0 = 0 Reserved
BIT0 = 1 16 bits (default)
SRST: System Reset
Default value: 0
This bit is used to enable system reset. All circuits are reset by setting SRST = 1. After completing the reset
sequence, SRST is set to 0 automatically.
SRST = 0 Reset disabled (default)
SRST = 1 Reset enabled
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