Datasheet

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PCM1772 , PCM1773
SLES010G – SEPTEMBER 2001 – REVISED MARCH 2007
PCM1773PW
TERMINAL
I/O DESCRIPTION
NAME NO.
AGND1 5 — Analog ground. This is a return for V
CC1
.
AGND2 6 — Analog ground. This is a return for V
CC2
.
AIN 10 I Monaural analog signal mixer input. The signal can be mixed with the output of the L- and R-channel DACs.
AMIX 14 I Analog mixing control
BCK 3 I Serial bit clock. Clocks the individual bits of the audio data input, DATA.
DATA 2 I Serial audio data input
DEMP 13 I De-emphasis control
FMT 15 I Data format select
LRCK 1 I Left and right clock. Determines which channel is being input on the audio data input, DATA. The frequency of
LRCK must be the same as the audio sampling rate.
PD 4 I Reset input. When low, the PCM1773 device is powered down, and all mode control registers are reset to default
settings.
SCKI 16 I System clock input
V
CC1
12 — Power supply for all analog circuits except the lineout amplifier
V
CC2
11 — Analog power supply for the lineout amplifier circuits. The voltage level must be the same as V
CC1
.
V
COM
7 — Decoupling capacitor connection. An external 10- µ F capacitor connected from this terminal to analog ground is
required for noise filtering. Voltage level of this terminal is 0.5 V
CC2
nominal.
V
OUT
L 9 O L-channel analog signal output of the lineout amplifiers
V
OUT
R 8 O R-channel analog signal output of the lineout amplifiers
PCM1773RGA
TERMINAL
I/O DESCRIPTION
NAME NO.
AGND1 4 — Analog ground. This is a return for V
CC1
.
AGND2 5 — Analog ground. This is a return for V
CC2
.
AIN 10 I Monaural analog signal mixer input. The signal can be mixed with the output of the L- and R-channel DACs.
AMIX 14 I Analog mixing control
BCK 2 I Serial bit clock. Clocks the individual bits of the audio data input, DATA.
DATA 1 I Serial audio data input
DEMP 13 I De-emphasis control
FMT 15 I Data format select
LRCK 20 I Left and right clock. Determines which channel is being input on the audio data input, DATA. The frequency of
LRCK must be the same as the audio sampling rate.
NC 8, 17, — No connect
18, 19
PD 3 I Reset input. When low, the PCM1773 device is powered down, and all mode control registers are reset to default
settings.
SCKI 16 I System clock input
V
CC1
12 — Power supply for all analog circuits except the lineout amplifier
V
CC2
11 — Analog power supply for the lineout amplifier circuits. The voltage level must be the same as V
CC1
.
V
COM
6 — Decoupling capacitor connection. An external 10- µ F capacitor connected from this terminal to analog ground is
required for noise filtering. Voltage level of this terminal is 0.5 V
CC2
nominal.
V
OUT
L 9 O L-channel analog signal output of the lineout amplifiers
V
OUT
R 7 O R-channel analog signal output of the lineout amplifiers
7
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