Datasheet

PCM1753
PCM1754
PCM1755
SLES092C – OCTOBER 2003 – REVISED FEBRUARY 2009
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18
Control Interface Timing Requirements
Figure 25 shows a detailed timing diagram for the serial control interface. These timing parameters are critical
for proper control port operation.
t
(MCH)
ML
t
(MLS)
LSB
t
(MCL)
t
(MHH)
t
(MLH)
t
(MCY)
t
(MDH)
t
(MDS)
MC
MD
PARAMETERS SYMBOL MIN TYP MAX UNITS
MC pulse cycle time t
(MCY)
100 ns
MC low-level time t
(MCL)
50 ns
MC high-level time t
(MCH)
50 ns
ML high-level time t
(MHH)
(2)
ns
ML falling edge to MC rising edge t
(MLS)
20 ns
ML hold time
(1)
t
(MLH)
20 ns
MD hold time t
(MDH)
15 ns
MD setup time t
(MDS)
20 ns
(1)
MC rising edge for LSB to ML rising edge.
(2)
3
256 f
S
sec (min); f
S
: sampling rate
Figure 25. Control Interface Timing