Datasheet

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PIN ASSIGNMENTS
BCK
DATA
LRCK
DGND
V
DD
V
CC
V
OUT
L
V
OUT
R
SCK
ML
MC
MD
ZEROL/NA
ZEROR/ZEROA
V
COM
AGND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PCM1742
PCM1742
SBAS176A – DECEMBER 2000 – REVISED APRIL 2005
PCM1742DBQ PACKAGE
(TOP VIEW)
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
AGND 9 – Analog ground
BCK 1 I Audio data bit clock input
(1)
DATA 2 I Audio data digital input
(1)
DGND 4 – Digital ground
LRCK 3 I L-channel and R-channel audio-data latch-enable input
(1)
MC 14 I Mode control clock input
(2)
MD 13 I Mode control data input
(2)
ML 15 I Mode control latch input
(2)
SCK 16 I System clock input
(1)
V
CC
6 – Analog power supply, 5 V
V
COM
10 – Common voltage decoupling
V
DD
5 – Digital power supply, 3.3 V
V
OUT
L 7 O Analog output for L-channel
V
OUT
R 8 O Analog output for R-channel
ZEROL/NA 12 O Zero-flag output for L-channel/No assign
ZEROR/ZEROA 11 O Zero-flag output for R-channel/Zero-flag output for L-/R-channel
(1) Schmitt-trigger input, 5-V tolerant.
(2) Schmitt-trigger input with internal pulldown, 5-V tolerant.
6