Datasheet

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PCM1738
SBAS174C – FEBRUARY 2002 – REVISED FEBRUARY 2007
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
REGISTER 19 W/R 0 0 1 0 0 1 1 REV ATS1 ATS0 OPE CLKD CLKE FLT INZD
W/R Read/Write Mode Control
When W/R = 0, a write operation is performed.
When W/R = 1, a read operation is performed.
Default value: 0
REV Output Phase Reversal
This bit is read/write.
Default value: 0
REV = 0 Normal output (default)
REV = 1 Inverted output
The REV bit is used to invert the output phase for both the left and right channels.
ATS[1:0] Attenuation Rate Select
This bit is read/write.
Default value: 00
ATS[1:0] Attenuation Rate Selection
00 LRCK (default)
01 1/2 × LRCK
10 1/4 × LRCK
11 1/8 × LRCK
The ATS[1:0] bits are used to select the rate at which the attenuator is decremented or incremented
during level transitions.
OPE DAC Operation Control
This bit is read/write.
Default value: 0
OPE = 0 DAC operation enabled (default)
OPE = 1 DAC operation disabled
The OPE bit is used to enable or disable the analog output for both channels. Disabling the analog
outputs forces them to the bipolar zero level (BPZ), ignoring the audio data input(s).
CLKD SCKO Frequency Selection
This bit is read/write.
Default value: 0
CLKD = 0 Full-rate, f
SCKO
= f
SCKI
(default)
CLKD = 1 Half-rate, f
SCKO
= f
SCKI
/2
The CLKD bit is used to determine the output frequency at the system clock output pin, SCKO.
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