Datasheet

www.ti.com

EXTERNAL DIGITAL FILTER INTERFACE AND TIMING

DSD (DIRECT STREAM DIGITAL) FORMAT INTERFACE AND TIMING

FUNCTIONAL DESCRIPTIONS

ZERO DETECT

SOFT MUTE

SERIAL CONTROL INTERFACE

PCM1738

SBAS174C – FEBRUARY 2002 – REVISED FEBRUARY 2007

The PCM1738 supports an external digital-filter interface comprised of a 4-wire synchronous serial port that

allows the use of an external digital filter. External filters include the DF1704 and DF1706 from Texas

Instruments, the Pacific Microsonics PMD200, or a programmable digital signal processor.

The 4-wire interface includes WDCK as the word clock, BCK as the bit clock, DATAL as the L-channel data, and

DATAR as the R-channel data. The external digital-filter interface is selected using the DFTH bit of mode control

assigned to WDCK (pin 4), BCK (pin 6), DATAL (pin 5), and DATAR (pin 15).

The PCM1738 supports a DSD format interface operation that includes out-of-band noise filtering using an

internal analog FIR filter. For DSD operation, pin 7 is redefined as BCK, which operates at 64 × 44.1 kHz; pin 5

is redefined as DATAL (left-channel audio data), and pin 15 becomes DATAR (right-channel audio data). Pins 4

and 6 must be forced LOW in DSD mode. This configuration allows for direct interface to a DSD decoder for

SACD applications. Detailed information for the DSD mode is provided in the Application for DSD Format (DSD

Mode) Interface section of this data sheet.

When the PCM1738 detects that the audio input data in the L-channel or R-channel is continuously zero for

1024 LRCKs, the PCM1738 sets ZEROL (pin 2) or ZEROR (pin 3) to HIGH. Setting the INZD bit of mode control

The PCM1738 supports mute operation by both hardware and software control. When MUTE (pin 15) is set to

HIGH, both analog outputs are turned to the bipolar zero level. When the MUTE bit in mode control register 18 is

set to 1, both analog outputs are also turned to the bipolar zero level. The speed to turn to the bipolar zero level

is set by the ATS0 and ATS1 bits in mode congtrol register 19.

The serial control interface is a 4-wire synchronous serial port that operates asynchronously to the serial audio

interface and the system clock (SCKI). The serial control interface is used to program the on-chip mode control

registers. The control interface includes MDO (pin 11), MDI (pin 12), MC (pin 13), and CS (pin 14). MDO is the

serial data output, used to read back the values of the mode control registers; MDI is the serial data input, used

to program the mode control registers; MC is the serial bit clock, used to shift data in and out of the control port;

and CS is the mode control enable, used to enable the internal mode control register access. Figure 37 and

Figure 38 show the format and timing for the serial control interface.

Submit Documentation Feedback