Datasheet
®
9 PCM1716
Input Audio Data Format
Input data format can be selected by I
2
S (pin 28) and IWO
(pin 23)
DM1 (Pin 27) DM0 (Pin 26) DE-EMPHASIS
L L OFF
L H 48kHz
H L 44.1kHz
H H 32kHz
TABLE IV. De-emphasis Control.
I
2
S (Pin 28) IWO (Pin 23) DATA FORMAT
L L 16-Bit Data Word, Normal, Right Justified
L H 20-Bit Data Word, Normal, Right Justified
H L 16-Bit Data Word, I
2
S Format
H H 24-Bit Data Word, I
2
S Format
TABLE V. Data Format Control.
SOFT MUTE
Soft Mute function can be controlled by MUTE (pin 25)
SOFTWARE MODE (MODE = H)
PCM1716’s special functions at software mode is shown in
Table VI. These functions are controlled using a ML, MC,
MD serial control signal.
MUTE (Pin 25) SOFT MUTE
L Mute ON
H Mute OFF (Normal Operation)
FUNCTION DEFAULT MODE
Input Audio Data Format Selection
Standard Format
Left Justified Standard Format
I
2
S Format
Input Audio Data Bit Selection
16-Bit 16-Bit
20-Bit
24-Bit
Input LRCIN Polarity Selection
Lch/Rch = High/Low Lch/Rch = High/Low
Lch/Rch = Low/High
De-emphasis Control OFF
Soft Mute Control OFF
Attenuation Control
Lch, Rch Individually 0dB, Individual
Lch, Rch Common
Infinite Zero Mute Control Not Operated
DAC Operation Control Operated
Sampling Rate Selection for De-emphasis
Standard Frequency
44.1kHz 44.1kHz
48kHz
32kHz
Slow Roll-Off Selection Not Selected
(Sharp Roll-Off)
Output Phase Selection Not Inverted
CLK0 Output Selection Input Frequency
TABLE VI. Selectable Functions and Default.
PROGRAM REGISTER BIT MAPPING
PCM1716’s special functions are controlled using four pro-
gram registers which are 16 bits long. These registers are all
loaded using MD. After the 16 data bits are clocked in, ML
is used to latch in the data to the appropriate register. Table
VII shows the complete mapping of the four registers and
Figure 7 illustrates the serial interface timing.
MAPPING OF PROGRAM REGISTERS
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
MODE0 res res res res res A1 A0 LDL AL7 AL6 AL5 AL4 AL3 AL2 AL1 AL0
MODE1 res res res res res A1 A0 LDR AR7 AR6 AR5 AR4 AR3 AR2 AR1 AR0
MODE2 res res res res res A1 A0 res res res res IW1 IW0 OPE DEM MUT
MODE3 res res res res res A1 A0 IZD SF1 SF0 CK0 REV SR0 ATC LRP I
2
S
FIGURE 7. Three-Wire Serial Interface.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
ML (pin 28)
MC (pin 27)
MD (pin 26)
Not Recommended For New Designs