Datasheet

®
12
PCM1716
THEORY OF OPERATION
The delta-sigma section of PCM1716 is based on a 8-level
amplitude quantizer and a 4th-order noise shaper. This
section converts the oversampled input data to 8-level delta-
sigma format.
This newly developed, “Enhanced Multi-level Delta-Sigma”
architecture achieves high-grade audio dynamic performance
and sound quality.
A block diagram of the 8-level delta-sigma modulator is
shown in Figure 9. This 8-level delta-sigma modulator has
the advantage of stability and clock jitter sensitivity over the
typical one-bit (2 level) delta-sigma modulator.
The combined oversampling rate of the delta-sigma modu-
lator and the internal 8-times interpolation filter is 64f
S
for
all system clock ratios (256/384/512/768f
S
).
The theoretical quantization noise performance of the
8-level delta-sigma modulator is shown in Figure 10. This
enhanced multi-level delta-sigma architecture also has ad-
vantages for input clock jitter sensitivity due to the multi-
level quantizer, simulated jitter sensitivity is shown in
Figure 11.
+
Z
–1
8-Level Quantizer
+
Z
–1
+
Z
–1
–
+
Z
–1
+
+
FIGURE 9. 8-Level Delta-Sigma Modulator.
012345678
0
–20
–40
–60
–80
–100
–120
–140
–160
–180
Amplitude (dB)
Frequency (f
S
)
FIGURE 10. Quantization Noise Spectrum.
FIGURE 11. Jitter Sensitivity.
0 100 200 300 400 500 600
125
120
115
110
105
100
95
90
85
80
Dynamic Range (dB)
Jitter (ps)
CLOCK JITTER
Not Recommended For New Designs