Datasheet

®
2
PCM1704
SPECIFICATIONS
All specifications at T
A
= +25°C, ±V
CC
= ±V
DD
= ±5V, f
S
= 768kHz (96kHz • 8), and 24-bit data, unless otherwise noted.
PCM1704U
PARAMETER CONDITIONS MIN TYP MAX UNITS
RESOLUTION 24 Bits
DATA FORMAT
Audio Data Interface Format 20-, 24-Bit, MSB-First
Audio Data Code Binary Two’s Complement
Sampling Frequency (f
S
) 16 96 kHz
Input Clock Frequency 25 MHz
DIGITAL INPUT/OUTPUT
Input Logic Level:
V
IH
(1)
+2.0 +5.0 V
V
IL
(1)
0 +0.8 V
V
IH
(2)
–3.0 0 V
V
IL
(2)
–5.0 –4.2 V
Input Logic Current:
I
IH
(1)
V
IH
= +V
DD
±10 µA
I
IL
(1)
V
IL
= 0V ±10 µA
I
IH
(2)
V
IH
= 0V ±10 µA
I
IL
(2)
V
IL
= –V
DD
–100 µA
DYNAMIC PERFORMANCE(3)
THD+N V
O
= 0dB PCM1704U 0.0025 0.0030 %
PCM1704U-J 0.0015 0.0025 %
PCM1704U-K 0.0008 0.0015 %
V
O
=–20dB PCM1704U 0.008 0.020 %
PCM1704U-J 0.007 0.015 %
PCM1704U-K 0.006 0.01 %
Dynamic Range EIAJ, A-weighted
PCM1704U, U-J 102 110 dB
PCM1704U-K 106 112 dB
Signal-to-Noise Ratio EIAJ, A-weighted 112 120 dB
Low Level Linearity f = 1002Hz at –90dB ±0.5 dB
DC ACCURACY
Gain Error ±1.0 ±3.0 % of FSR
Bipolar Zero Error ±0.5 ±1.0 % of FSR
Gain Drift 0°C to 70°C ±25 ppm of FSR/°C
Bipolar Zero Error Drift 0°C to 70°C ±5 ppm of FSR/°C
ANALOG OUTPUT
Output Range ±1.2 mA
Output Impedance 1.0 kΩ
Settling Time ±0.0003% of FSR, ±1.2mA Step 200 ns
POWER SUPPLY REQUIREMENTS
Voltage Range: +V
CC
= +V
DD
+4.75 +5.0 +5.25 VDC
–V
CC
= –V
DD
–4.75 –5.0 –5.25 VDC
Combined Supply Current:+I
CC
+V
CC
= +V
DD
= +5.0V 5 8 mA
–I
CC
–V
CC
= –V
DD
= –5.0V 30 45 mA
TEMPERATURE RANGE
Operation –25 +85 °C
Storage –55 +125 °C
NOTES: (1) BCLK, WCLK, DATA. (2) 20BIT, INVERT. (3) Dynamic performance data is tested with 5534 I/V amp with 7.5kΩ feedback resistor. THD+N data is
tested by Shibasoku 725C with 30kHz external LPF, 400Hz HPF, average mode. Input signal frequency = 1.1kHz.