Datasheet
PCM1690
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.............................................................................................................................................. SBAS448A – OCTOBER 2008 – REVISED JANUARY 2009
SRDA[1:0] Sampling mode selection
These bits control the sampling mode of DAC operation. In Auto mode, the sampling mode is
automatically set according to multiples between the system clock and sampling clock, single rate
for 512 f
S
, 768 f
S
, and 1152 f
S
, dual rate for 256 f
S
or 384 f
S
, and quad rate for 128 f
S
and 192 f
S
.
Default value = 00.
SRDA Sampling mode selection
00 Auto (default)
01 Single rate
10 Dual rate
11 Quad rate
DEC HEX B7 B6 B5 B4 B3 B2 B1 B0
65 41 PSMDA RSV RSV RSV FMTDA3 FMTDA2 FMTDA1 FMTDA0
PSMDA Power-save mode selection
This bit selects the power-save mode for the OPEDA[3:0] function. When PSMDA = 0,
OPEDA[3:0] controls the power-save mode and normal operation. When PSMDA = 1, OPEDA
functions controls the DAC disable (not power-save mode) and normal operation.
Default value: 0.
PSMDA Power-save mode selection
0 Power-save enable mode (default)
1 Power-save disable mode
RSV Reserved
Reserved; do not use.
FMTDA[3:0] Audio interface format selection
These bits control the audio interface format for DAC operation. Details of the format, and any
related restrictions with the system clock are described in the Audio Data Interface Formats and
Timing section.
Default value: 0000 (16-/20-/24-/32-bit I
2
S format).
FMTDA Audio interface format selection
0000 16-/20-/24-/32-bit I
2
S format (default)
0001 16-/20-/24-/32-bit left-justified format
0010 24-bit right-justified format
0011 16-bit right-justified format
0100 24-bit I
2
S mode DSP format
0101 24-bit left-justified mode DSP format
0110 24-bit I
2
S mode TDM format
0111 24-bit left-justified mode TDM format
1000 24-bit high-speed I
2
S mode TDM format
1001 24-bit high-speed left-justified mode TDM format
101x Reserved
11xx Reserved
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