Datasheet
THREE-WIRE (SPI) SERIAL CONTROL
CONTROL DATA WORD FORMAT
ADR6
0
RegisterAddress RegisterData
ADR5
ADR4
ADR3
ADR2 ADR1
ADR0
D7
D6 D5
D4
D3
D2 D1
D0
MSB LSB
REGISTER WRITE OPERATION
MS
MC
MD
X
(1)
'0'
ADR6 ADR5
ADR4
ADR3
ADR2 ADR1
ADR0
D7
D6 D5
D4
D3
D2 D1
D0
X X
0
ADR6
PCM1690
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.............................................................................................................................................. SBAS448A – OCTOBER 2008 – REVISED JANUARY 2009
Table 12. FMT Functionality
FMT DESCRIPTION
Low 16-/20-/24-/32-bit I
2
S format
High 24-bit I
2
S mode TDM format
The PCM1690 includes an SPI-compatible serial port that operates asynchronously with the audio serial
interface. The control interface consists of MD/SDA/DEMP, MC/SCL/FMT, and MS/ADR0/RSV. MD is the serial
data input to program the mode control registers. MC is the serial bit clock that shifts the data into the control
port. MS is the select input to enable the mode control port.
All single write operations via the serial control port use 16-bit data words. Figure 32 shows the control data word
format. The first bit (fixed at '0') is for write controls; after the first bit are seven other bits, labeled ADR[6:0] that
set the register address for the write operation. The eight least significant bits (LSBs), D[7:0] on MD, contain the
data to be written to the register specified by ADR[6:0].
Figure 32. Control Data Word Format for MD
Figure 33 shows the functional timing diagram for single write operations on the serial control port. MS is held at
a high state until a register is to be written. To start the register write cycle, MS is set to a low state. 16 clocks
are then provided on MC, corresponding to the 16 bits of the control data word on MD. After the 16th clock cycle
has been completed, MS is set high to latch the data into the indexed mode control register.
Also, the PCM1690 supports multiple write operations in addition to single write operations, which can be
performed by sending the following N-times of the 8-bit register data after the first 16-bit register address and
register data while keeping the MC clocks and MS at a low state. Closing a multiple write operation can be
accomplished by setting MS to a high state.
(1) X = don't care.
Figure 33. Register Write Operation
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