Datasheet

6–2
6.2 Recommended Operating Conditions (see Note 3)
OPERATION MIN NOM MAX UNIT
V
CC
Supply voltage (core) Commercial 3.3 V 3 3.3 3.6 V
PV
PCI primary bus I/O clamping rail voltage
Commercial
3.3 V 3 3.3 3.6
V
PV
CCP
PCI primary bus I/O clamping rail voltage Commercial
5 V 4.75 5 5.25
V
SV
PCI secondary bus I/O clamping rail voltage
Commercial
3.3 V 3 3.3 3.6
V
SV
CCP
PCI secondary bus I/O clamping rail voltage Commercial
5 V 4.75 5 5.25
V
PCI
3.3 V 0.5 V
CCP
V
CCP
V
IH
High-level input voltage
PCI
5 V 2 V
CCP
V
V
IH
High level
in ut
voltage
TTL
3.3 V 2.25 V
CC
V
PCI
3.3 V 0 0.3 V
CCP
V
IL
High-level input voltage
PCI
5 V 0
0.8
V
V
IL
gg
TTL
0 0.75
V
Input voltage
PCI 0 V
CCP
V
V
I
Input voltage
TTL
0 V
CC
V
V
§
Output voltage
3.3 V 0 V
CC
V
V
O
§
Output voltage
5 V
0 V
CC
V
t
Input transition time (t and t
f
)
PCI
1 4
nS
t
t
Input transition time (t
r
and t
f
)
TTL
0 6
nS
T
A
Operating ambient temperature range
3.3 V 0 25 70
°C
T
J
Virtual junction temperature
5 V 0 25 115
°C
NOTES: 3. Unused or floating pins (input or I/O) must be held high or low.
Applies for external input and bidirectional buffers without hysteresis
TTL terminals are Schmitt-trigger input-only terminals: 55, 69, 132, 174 for PGF-packaged device; and 49, 63, 120, 159 for PCM-packaged
device.
§
Applies for external output buffers
These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
6.3 Recommended Operating Conditions for PCI Interface
OPERATION MIN NOM MAX UNIT
V
CC
Core voltage Commercial 3.3 V 3 3.3 3.6 V
V
PCI supply voltage
Commercial
3.3 V 3 3.3 3.6
V
V
CCP
PCI supply voltage Commercial
5 V 4.75 5 5.25
V
V
Input voltage
3.3 V 0 V
CCP
V
V
I
Input voltage
5 V
0 V
CCP
V
V
§
Output voltage
3.3 V 0 V
CCP
V
V
O
§
Output voltage
5 V
0 V
CCP
V
V
High le el inp t oltage
CMOS compatible
3.3 V 0.5 V
CCP
V
V
IH
High-level input voltage
CMOS compatible
5 V 2
V
V
Low level input voltage
CMOS compatible
3.3 V 0.3 V
CCP
V
V
IL
Low-level input voltage
CMOS compatible
5 V
0.8
V
§
Applies to external output buffers
Applies to external input and bidirectional buffers without hysteresis