Datasheet

6−6
6.6 Parameter Measurement Information
†
C
LOAD
includes the typical load-circuit distributed capacitance.
C
LOAD
Test
Point
Timing
Input
(see Note A )
Out-of-Phase
Output
t
pd
50% V
CC
50% V
CC
V
CC
0 V
0 V
0 V
0 V
0 V
V
OL
t
h
t
su
V
OH
V
OH
V
OL
High-Level
Input
Low-Level
Input
t
w
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
LOAD CIRCUIT
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
t
pd
t
pd
t
pd
V
LOAD
I
OH
I
OL
From Output
Under Test
90% V
CC
10% V
CC
t
f
t
r
Output
Control
(Low-Level
Enabling)
Waveform 1
(see Notes B and C)
Waveform 2
(see Notes B and C)
V
OL
V
OH
V
OH
− 0.3 V
t
PZL
t
PZH
t
PLZ
t
PHZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
V
OL
+ 0.3 V
0 V
0 V
≈ 50% V
CC
≈ 50% V
CC
t
en
t
dis
t
pd
t
PZH
t
PZL
t
PHZ
t
PLZ
C
LOAD
†
(pF)
I
OL
(mA)
TIMING
PARAMETER
50 8 −8
0
3
1.5
‡
50 8
8
−8
−8
LOAD CIRCUIT PARAMETERS
= 50 Ω, where V
OL
= 0.6 V, I
OL
= 8 mA
I
OL
50
‡
V
LOAD
− V
OL
I
OH
(mA)
V
LOAD
(V)
Data
Input
In-Phase
Output
Input
(see Note A)
V
CC
V
CC
V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
V
CC
V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
50% V
CC
NOTES: A. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by pulse generators having the
following characteristics: PRR = 1 MHz, Z
O
= 50 Ω, t
r
≤ 6 ns, t
f
≤ 6 ns.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. For t
PLZ
and t
PHZ
, V
OL
and V
OH
are measured values.
50% V
CC
Figure 6−3. Load Circuit and Voltage Waveforms