Datasheet

6−2
6.2 Recommended Operating Conditions (see Note 3)
OPERATION MIN NOM MAX UNIT
V
CC
Supply voltage (core) Commercial 3.3 V 3 3.3 3.6 V
PV
PCI primary bus I/O clamping rail voltage
Commercial
3.3 V 3 3.3 3.6
V
P_V
CCP
PCI primary bus I/O clamping rail voltage Commercial
5 V 4.75 5 5.25
V
SV
PCI secondary bus I/O clamping rail voltage
Commercial
3.3 V 3 3.3 3.6
V
S_V
CCP
PCI secondary bus I/O clamping rail voltage Commercial
5 V 4.75 5 5.25
V
PCI
3.3 V 0.5 V
CCP
V
CCP
PCI
5 V 2 V
CCP
V
†
High le el inp t oltage
CMOS 0.7 V
CC
V
CC
V
V
IH
†
High-level input voltage
CLK
¶
0.57 V
CCP
V
CCP
V
P_RST_L 0.77 V
CCP
V
CCP
TRST_L 0.9 V
CC
V
CC
PCI
3.3 V 0 0.3 V
CCP
V
†
Low level input voltage
PCI
5 V 0
0.8
V
V
IL
†
Low-level input voltage
CMOS
0
0.2 V
CC
V
CLK
¶
0
0.2 V
CCP
V
Input voltage
PCI 0 V
CCP
V
V
I
Input voltage
CMOS
0 V
CCP
V
V
O
‡
Output voltage Output voltage
0 V
CC
V
t
Input transition time (t and t )
PCI
1 4
ns
t
t
Input transition time (t
r
and t
f
)
CMOS
0 6
ns
T
Operating ambient temperature range
PCI2050B
0 25 70
°C
T
A
Operating ambient temperature range
PCI2050BI
−40 25 85
°C
T
J
§
Virtual junction temperature
0 25 115 °C
NOTES: 3. Unused terminals (input or I/O) must be held high or low to prevent them from floating.
†
Applies to external input and bidirectional buffers without hysteresis
‡
Applies to external output buffers
§
These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
¶
CLK includes P_CLK and S_CLK terminals.