Datasheet

3−9
• 0x48 – GPIO interrupt type register (all implemented bits)
• 0x4C – Miscellaneous control register (all implemented bits)
• 0x4C – Diagnostic register (all implemented bits)
• 0x52 – Power management capabilities register (D3cold_PMESupport)
• 0x54 – Power management control/status register (PMCSR.PME_STS, PMCSR.PME_ENB)
PCI2040 PME
context bits for HPI CSR space:
• 0x00 / 0x04 – Interrupt event register (all implemented bits)
• 0x08 / 0x0C – Interrupt mask register (all implemented bits)
• 0x10 – HPI error report register (all implemented bits)
• 0x14 – HPI reset register (all implemented bits)
• 0x16 – HPI implementation register (all implemented bits)
• 0x18 – HPI data width register (all implemented bits)
RESET
PCI_RST
Non-PME Context
PME Context
GRST
RESET
Figure 3−3. PCI2040 Reset Illustration
3.9 Compact PCI Hot-Swap
PCI2040 is hot-swap friendly silicon that will support all the hot-swap capable features, contain support for software
control, and integrate circuitry required by the Compact PCI Hot Swap Specification PICMG 2.1. To be hot-swap
capable, PCI2040 supports the following:
• PCI Local Bus Specification, Revision 2.1 compliance
• V
CC
from early power tolerant
• Asynchronous reset
• Precharge voltage tolerant
• I/O buffers must meet modified V/I requirements
• Limited I/O pin voltage at precharge voltage
• Hot swap control and status programming via extended PCI capabilities linked list
• Hot swap terminals: HSENUM
, HSSWITCH, and HSLED
CPCI hot-swap defines a process for installing and removing PCI boards without adversely affecting a running
system. The PCI2040 provides this functionality such that it can be implemented on a board that can be removed
and inserted in a hot-swap system.
The PCI2040 provides three terminals to support hot-swap: HSENUM
(output), HSSWITCH (input), and HSLED
(output). The HSENUM
output indicates to the system that an insertion event occurred or that a removal event is about
to occur. The HSSWITCH input indicates that state of a board ejector handle, and the HSLED output lights a blue
LED to signal insertion and removal ready status.
The PCI2040 hot-swap functionality is controlled via the CPCI hot swap control and status register (see Section 4.35)
in extended PCI configuration space. This register provides four bits for control: bit 7 (INS), bit 6 (EXT), bit 3 (LOO),