Datasheet

5−2
CardBus Socket/ExCA Base Address
16-Bit Legacy-Mode Base Address
10h
44h
NOTE: The CardBus socket/ExCA base address mode register is separate for functions 0 and 1.
PCI1520 Configuration Registers
CardBus
Socket A
Registers
Host
Memory Space
00h
ExCA
Registers
Card A
20h
800h
844h
Offset
CardBus
Socket B
Registers
Host
Memory Space
00h
ExCA
Registers
Card B
20h
800h
844h
OffsetOffset
Figure 5−2. ExCA Register Access Through Memory
The interrupt registers in the ExCA register set, as defined by the 82365SL−DL specification, control such card
functions as reset, type, interrupt routing, and interrupt enables. Special attention must be paid to the interrupt routing
registers and the host interrupt signaling method selected for the PCI1520 to ensure that all possible PCI1520
interrupts can potentially be routed to the programmable interrupt controller. The ExCA registers that are critical to
the interrupt signaling are the ExCA interrupt and general control register (ExCA offset 03h/43h/803h, see
Section 5.4) and the ExCA card status-change interrupt configuration register (05h/45h/805h, see Section 5.6).
Access to I/O mapped 16-bit PC cards is available to the host system via two ExCA I/O windows. These are regions
of host I/O address space into which the card I/O space is mapped. These windows are defined by start, end, and
offset addresses programmed in the ExCA registers described in this section. I/O windows have byte granularity.
Access to memory mapped 16-bit PC Cards is available to the host system via five ExCA memory windows. These
are regions of host memory space into which the card memory space is mapped. These windows are defined by start,
end, and offset addresses programmed in the ExCA registers described in this section. Table 5−1 identifies each
ExCA register and its respective ExCA offset. Memory windows have 4-Kbyte granularity.