Datasheet

3−13
Sb6 b4b5 b3 b2 b1 b0 0 b7 b6 b5 b4 b3 b2 b1 b0AA
Slave Address Word Address
R/W
S/P = Start/Stop ConditionA = Slave Acknowledgement
b7 b6 b4b5 b3 b2 b1 b0 A P
Data Byte
Figure 3−11. Serial-Bus Protocol − Byte Write
Figure 3−12 illustrates a byte read. The read protocol is very similar to the write protocol, except the R/W
command
bit must be set to 1 to indicate a read-data transfer. In addition, the PCI1520 master must acknowledge reception
of the read bytes from the slave transmitter. The slave transmitter drives the SDA signal during read data transfers.
The SCL signal remains driven by the PCI1520 master.
Sb6 b4b5 b3 b2 b1 b0 0 b7 b6 b5 b4 b3 b2 b1 b0AA
Slave Address Word Address
R/W
Sb6 b4b5 b3 b2 b1 b0 1 A
Slave Address
S/P = Start/Stop ConditionM = Master Acknowledgement
b7 b6 b4b5 b3 b2 b1 b0 M P
Data Byte
Start
Restart R/W
A = Slave Acknowledgement
Stop
Figure 3−12. Serial-Bus Protocol − Byte Read
Figure 3−13 illustrates EEPROM interface doubleword data collection protocol.
S1 10 0 0 0 0 0 b7 b6 b5 b4 b3 b2 b1 b0AA
Slave Address Word Address
R/W
Data Byte 2 Data Byte 1 Data Byte 0 M PMM
M = Master Acknowledgement
S/P = Start/Stop ConditionA = Slave Acknowledgement
Data Byte 3 M
S1 1000001A
Restart
R/W
Slave Address
Start
Figure 3−13. EEPROM Interface Doubleword Data Collection
3.6.3 Serial-Bus EEPROM Application
When the PCI bus is reset and the serial-bus interface is detected, the PCI1520 attempts to read the subsystem
identification and other register defaults from a serial EEPROM. The registers and corresponding bits that can be
loaded with defaults through the EEPROM are provided in Table 3−7.