Datasheet

3−5
PCI1520
(PCMCIA
Controller)
12 V
Power Supply
V
PP1
V
PP2
V
CC
V
CC
PC Card
A
TPS222X
5 V
3.3 V
CLOCK
V
PP1
V
PP2
V
CC
V
CC
PC Card
B
12 V
5 V
3.3 V
AVPP
AVCC
AVCC
BVPP
BVCC
BVCC
BVCC
AVCC
Supervisor
RESET
RESET
DATA
LATCH
Figure 3−3. TPS222X Typical Application
Table 3−2. Power Switch Options
DEVICE PIN-COMPATIBLE REPLACEMENT(S)
TPS2206
TPS2226IDB
†
– 30-pin SSOP
TPS2216ADAP – 32-pin TSSOP
TPS2214(A) TPS2224IDB
†
– 24-pin SSOP
TPS2216(A) TPS2226IDB
†
– 30 pin SSOP
TPS2223
†‡
N/A − Check for newer device
TPS2224
†
N/A − Check for newer device
TPS2226
†
N/A − Check for newer device
†
Recommended for new designs
‡
For applications not requiring 12 volts
The CLOCK terminal on the PCI1520 can be an input or an output. The PCI1520 defaults the CLOCK terminal as
an input to control the serial interface and the internal state machine. Bit 27 (P2CCLK) in the system control register
(offset 80h, see Section 4.29) can be set by the platform BIOS or the serial EEPROM to enable the PCI1520 to
generate and drive CLOCK internally from the PCI clock. When the system design implements CLOCK as an output
from the PCI1520, an external pulldown resistor is required.
3.5.3 Zoomed Video Support
The PCI1520 allows for the implementation of zoomed video (ZV) for PC Cards. Zoomed video is supported by setting
bit 6 (ZVENABLE) in the card control register (PCI offset 91h, see Section 4.32) on a per-socket function basis.
Setting this bit puts 16-bit PC Card address lines A25−A4 of the PC Card interface in the high-impedance state. These
lines can then transfer video and audio data directly to the appropriate controller. Card address lines A3−A0 can still
access PC Card CIS registers for PC Card configuration. Figure 3−4 illustrates a PCI1520 ZV implementation.