Datasheet

2−17
Table 2−12. 16-Bit PC Card Interface Control Terminals (Slots A and B)
TERMINAL
NUMBER
I/O
DESCRIPTION
NAME
SLOT A
†
SLOT B
‡
I/O
DESCRIPTION
NAME
PDV GHK PDV GHK
BVD1
(STSCHG
/RI)
141 H14 73 U09 I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that
include batteries. BVD1 is used with BVD2 as an indication of the condition of the
batteries on a memory PC Card. Both BVD1 and BVD2 are high when the battery
is good. When BVD2 is low and BVD1 is high, the battery is weak and should be
replaced. When BVD1 is low, the battery is no longer serviceable and the data in
the memory PC Card is lost. See Section 5.6, ExCA Card Status-Change Interrupt
Configuration Register, for enable bits. See Section 5.5, ExCA Card
Status-Change Register, and Section 5.2, ExCA Interface Status Register, for the
status bits for this signal.
Status change. STSCHG
is used to alert the system to a change in the READY,
write protect, or battery voltage dead condition of a 16-bit I/O PC Card.
Ring indicate. RI
is used by 16-bit modem cards to indicate a ring detection.
BVD2
(SPKR
)
140 H17 72 V09 I
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that
include batteries. BVD2 is used with BVD1 as an indication of the condition of the
batteries on a memory PC Card. Both BVD1 and BVD2 are high when the battery
is good. When BVD2 is low and BVD1 is high, the battery is weak and should be
replaced. When BVD1 is low, the battery is no longer serviceable and the data in
the memory PC Card is lost. See Section 5.6, ExCA Card Status-Change Interrupt
Configuration Register, for enable bits. See Section 5.5, ExCA Card
Status-Change Register, and Section 5.2, ExCA Interface Status Register, for the
status bits for this signal.
Speaker. SPKR
is an optional binary audio signal available only when the card and
socket have been configured for the 16-bit I/O interface. The audio signals from
cards A and B are combined by the PCI1520 and are output on SPKROUT.
CD1
CD2
83
144
U11
G18
15
75
H05
P09
I
Card detect 1 and card detect 2. CD1 and CD2 are internally connected to ground
on the PC Card. When a PC Card is inserted into a socket, CD1
and CD2 are pulled
low. For signal status, see Section 5.2, ExCA Interface Status Register.
CE1
CE2
96
98
V14
U14
27
30
K05
L02
O
Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered
address bytes. CE1
enables even-numbered address bytes, and CE2 enables
odd-numbered address bytes.
INPACK 130 K17 61 R07 I
Input acknowledge. INPACK is asserted by the PC Card when it can respond to an
I/O read cycle at the current address.
IORD
101 V15 33 L05 O
I/O read. IORD is asserted by the PCI1520 to enable 16-bit I/O PC Card data output
during host I/O read cycles.
IOWR
102 R14 34 M01 O
I/O write. IOWR is driven low by the PCI1520 to strobe write data into 16-bit I/O PC
Cards during host I/O write cycles.
†
Terminal name for slot A is preceded with A_. For example, the full name for terminals 130 and K17 is A_INPACK
.
‡
Terminal name for slot B is preceded with B_. For example, the full name for terminals 61 and R07 is B_INPACK
.