Datasheet

7−4
7.5 PCI Timing Requirements Over Recommended Ranges of Supply Voltage and
Operating Free-Air Temperature
This data manual uses the following conventions to describe time ( t ) intervals. The format is t
A
, where subscript A
indicates the type of dynamic parameter being represented. One of the following is used: t
pd
= propagation delay time,
t
d
(t
en
, t
dis
) = delay time, t
su
= setup time, and t
h
= hold time.
PARAMETER
ALTERNATE
SYMBOL
TEST CONDITIONS MIN MAX UNIT
t
pd
Propagation delay time, See Note 4
PCLK-to-shared signal
valid delay time
t
val
C
L
= 50 pF,
11
ns
t
pd
Propagation delay time, See Note 4
PCLK-to-shared signal
invalid delay time
t
inv
C
L
= 50 pF,
See Note 4
2
ns
t
en
Enable time, high impedance-to-active delay time from PCLK t
on
2 ns
t
dis
Disable time, active-to-high impedance delay time from PCLK t
off
28 ns
t
su
Setup time before PCLK valid t
su
7 ns
t
h
Hold time after PCLK high t
h
0 ns
NOTE 4: PCI shared signals are AD31−AD0, C/BE3−C/BE0, FRAME, TRDY, IRDY, STOP, IDSEL, DEVSEL, and PAR.