Datasheet
5−1
5 ExCA Compatibility Registers
The ExCA registers implemented in the PCI1510 controller are register-compatible with the Intel 82365SL−DF
PCMCIA controller. ExCA registers are identified by an offset value that is compatible with the legacy I/O index/data
scheme used on the Intel 82365 ISA controller. The ExCA registers are accessed through this scheme by writing the
register offset value into the index register (I/O base) and reading or writing the data register (I/O base + 1). The I/O
base address used in the index/data scheme is programmed in the PC Card 16-bit I/F legacy-mode base address
register (PCI offset 44h, see Section 4.28). The offsets from this base address run contiguously from 00h to 3Fh. See
Figure 5−1 for an ExCA I/O mapping illustration.
CardBus Socket/ExCA Base Address
16-Bit Legacy-Mode Base Address
10h
44h
00h
3Fh
Offset
Index
Host I/O Space
Data
PC Card A
ExCA
Registers
PCI1510 Configuration Registers
Offset
Figure 5−1. ExCA Register Access Through I/O
The controller also provides a memory-mapped alias of the ExCA registers by directly mapping them into PCI memory
space. They are located through the CardBus socket/ExCA base-address register (PCI offset 10h, see Section 4.12)
at memory offset 800h. See Figure 5−2 for an ExCA memory mapping illustration. This illustration also identifies the
CardBus socket register mapping, which is mapped into the same 4-K window at memory offset 00h.
CardBus Socket/ExCA Base Address
16-Bit Legacy-Mode Base Address
10h
44h
PCI1510 Configuration Registers
CardBus
Socket
Registers
Host
Memory Space
00h
ExCA
Registers
20h
800h
844h
OffsetOffset
Figure 5−2. ExCA Register Access Through Memory
The interrupt registers in the ExCA register set, as defined by the 82365SL−DL specification, control such card
functions as reset, type, interrupt routing, and interrupt enables. Special attention must be paid to the interrupt routing
registers and the host interrupt signaling method selected for the controller to ensure that all possible interrupts can
potentially be routed to the programmable interrupt controller. The ExCA registers that are critical to the interrupt