Datasheet

4−18
4.32 Card Control Register
The card control register is provided for PCI1130 compatibility. RI_OUT is enabled through this register. See
Table 4−10 for a complete description of the register contents.
Bit 7 6 5 4 3 2 1 0
Default 0 0 0 0 0 0 0 0
Register: Card control
Offset: 91h
Type: Read-only, Read/Write, Read/Clear
Default: 00h
Table 4−10. Card Control Register Description
BIT SIGNAL TYPE FUNCTION
7 RIENB RW
Ring indicate output enable.
0 = Disables any routing of RI_OUT
signal (default)
1 = Enables RI_OUT
signal for routing to the RI_OUT/PME terminal, when RIMUX is set to 0b,
and for routing to MFUNC2 or MFUNC4
6 ZVENABLE RW
Compatibility ZV mode enable. When set, the corresponding PC Card socket interface ZV terminals enter
a high-impedance state. This bit defaults to 0b.
5 RSVD RW Reserved. Do not change default value.
4−3 RSVD R Reserved. Bits 4 and 3 return 00b when read.
2 AUD2MUX RW
CardBus audio-to-IRQMUX. When set, the CAUDIO CardBus signal is routed to the corresponding
multifunction terminal which may be configured for CAUDPWM.
1 SPKROUTEN RW
Speaker out enable. When bit 1 is set, SPKR on the PC Card is enabled and is routed to SPKROUT. The
SPKROUT terminal drives data only when the SPKROUTEN bit is set. This bit is encoded as:
0 = SPKR to SPKROUT not enabled
1 = SPKR
to SPKROUT enabled
0 IFG RC
Interrupt flag. Bit 0 is the interrupt flag for 16-bit I/O PC Cards and for CardBus cards. Bit 0 is set when a
functional interrupt is signaled from a PC Card interface. Write back a 1b to clear this bit.
0 = No PC Card functional interrupt detected (default).
1 = PC Card functional interrupt detected.