Datasheet

6−1
6 CardBus Socket Registers
The PC Card Standard requires a CardBus socket controller to provide five 32-bit registers that report and control
socket-specific functions. The PCI1510 controller provides the CardBus socket/ExCA base-address register (PCI
offset 10h, see Section 4.12) to locate these CardBus socket registers in PCI memory address space. Table 6−1 gives
the location of the socket registers in relation to the CardBus socket/ExCA base address.
The controller implements an additional register at offset 20h that provides power management control for the socket.
CardBus Socket/ExCA Base Address
16-Bit Legacy-Mode Base Address
10h
44h
PCI1510 Configuration Registers
CardBus
Socket
Registers
Host
Memory Space
00h
ExCA
Registers
20h
800h
844h
OffsetOffset
Figure 6−1. Accessing CardBus Socket Registers Through PCI Memory
Table 6−1. CardBus Socket Registers
REGISTER NAME OFFSET
Socket event 00h
Socket mask 04h
Socket present-state 08h
Socket force event 0Ch
Socket control 10h
Reserved 14h−1Ch
Socket power-management 20h
A bit description table, typically included when a register contains bits of more than one type or purpose, indicates
bit field names, which appear in the signal column; a detailed field description, which appears in the function column;
and field access tags, which appear in the type column of the bit description table. Table 4−2 describes the field
access tags.