Datasheet
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Electrical Characteristics
I
2
C Interface Timing Requirements
PCF8575
REMOTE 16-BIT I
2
C AND SMBus I/O EXPANDER
WITH INTERRUPT OUTPUT
SCPS121D – JANUARY 2005 – REVISED APRIL 2007
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
V
IK
Input diode clamp voltage I
I
= –18 mA 2.5 V to 5.5 V –1.2 V
V
POR
Power-on reset voltage
(2)
V
I
= V
CC
or GND, I
O
= 0 V
POR
1.2 1.8 V
I
OH
P port V
O
= GND 2.5 V to 5.5 V –30 –300 µ A
I
OHT
P-port transient pullup current High during ACK, V
OH
= GND 2.5 V –0.5 –1 mA
SDA V
OL
= 0.4 V 3
V
OL
= 0.4 V 5 15
I
OL
P port 2.5 V to 5.5 V mA
V
OL
= 1 V 10 25
INT V
OL
= 0.4 V 1.6
SCL, SDA ± 5
I
I
V
I
= V
CC
or GND 2.5 V to 5.5 V µ A
A0, A1, A2 ± 1
I
IHL
P port V
I
≥ V
CC
or V
I
≤ GND 2.5 V to 5.5 V ± 400 µ A
5.5 V 100 200
V
I
= V
CC
or GND, I
O
= 0,
Operating mode 3.6 V 30 75
f
scl
= 400 kHz
2.7 V 20 50
I
CC
µ A
5.5 V 2.5 10
Standby mode V
I
= V
CC
or GND, I
O
= 0, f
scl
= 0 kHz 3.6 V 2.5 10
2.7 V 2.5 10
One input at V
CC
– 0.6 V,
∆ I
CC
Supply current increase 2.5 V to 5.5 V 200 µ A
Other inputs at V
CC
or GND
C
I
SCL V
I
= V
CC
or GND 2.5 V to 5.5 V 3 7 pF
SDA 3 7
C
io
V
IO
= V
CC
or GND 2.5 V to 5.5 V pF
P port 4 10
(1) All typical values are at nominal supply voltage (2.5-V, 3.3-V, or 5-V V
CC
) and T
A
= 25 ° C.
(2) The power-on reset circuit resets the I
2
C bus logic with V
CC
< V
POR
and sets all I/Os to logic high (with current source to V
CC
).
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 6 )
MIN MAX UNIT
f
scl
I
2
C clock frequency 400 kHz
t
sch
I
2
C clock high time 0.6 µ s
t
scl
I
2
C clock low time 1.3 µ s
t
sp
I
2
C spike time 50 ns
t
sds
I
2
C serial data setup time 100 ns
t
sdh
I
2
C serial data hold time 0 ns
t
icr
I
2
C input rise time 20 + 0.1C
b
(1)
300 ns
t
icf
I
2
C input fall time 20 + 0.1C
b
(1)
300 ns
t
ocf
I
2
C output fall time 10-pF to 400-pF bus 300 ns
t
buf
I
2
C bus free time between Stop and Start 1.3 µ s
t
sts
I
2
C start or repeated Start condition setup 0.6 µ s
t
sth
I
2
C start or repeated Start condition hold 0.6 µ s
t
sps
I
2
C Stop condition setup 0.6 µ s
t
vd
Valid-data time SCL low to SDA output valid 1.2 µ s
C
b
I
2
C bus capacitive load 400 pF
(1) C
b
= total bus capacitance of one bus line in pF
9
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