Datasheet
www.ti.com
22
I/O
Port
P17−P10
Shift
Register
16 Bits
LP Filter
Interrupt
Logic
Input
Filter
23
Power-On
Reset
Read Pulse
Write Pulse
PCF8575C
3
2
21
1
24
12
GND
V
CC
SDA
SCL
A2
A1
A0
INT
I
2
C Bus
Control
P07−P00
To Interrupt
Logic
P07−P00
V
CC
GND
C
I
S
D Q
FF
C
I
S
D Q
FF
Write Pulse
Data From
Shift Register
Power-On
Reset
Read Pulse
Data To
Shift Register
P17−P10
I
OL
I
OHT
PCF8575C
REMOTE 16-BIT I
2
C AND SMBus LOW-POWER I/O EXPANDER
WITH INTERRUPT OUTPUT
SCPS123E – MARCH 2005 – REVISED OCTOBER 2007
LOGIC DIAGRAM (POSITIVE LOGIC)
(A)
A. Pin numbers shown are for the DB, DBQ, DGV, DW, and PW packages.
SIMPLIFIED SCHEMATIC DIAGRAM OF EACH P-PORT INPUT/OUTPUT
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