Datasheet
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
PCA9557
SCPS133I – DECEMBER 2005 – REVISED JUNE 2008 ....................................................................................................................................................
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The system master can reset the PCA9557 in the event of a timeout or other improper operation by asserting a
low in the active-low reset ( RESET) input. The power-on reset puts the registers in their default state and
initializes the I
2
C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without
depowering the part.
Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I
2
C address, allowing up to eight
devices to share the same I
2
C bus or SMBus.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
QFN – RGV Reel of 2000 PCA9557RGVR PD557
QFN – RGY Reel of 1000 PCA9557RGYR PD557
Reel of 2500 PCA9557DR
SOIC – D Reel of 250 PCA9557DT PCA9557
Tube of 40 PCA9557D
– 40 ° C to 85 ° C Reel of 2000 PCA9557DBR
SSOP – DB PD557
Tube of 80 PCA9557DB
Reel of 2000 PCA9557PWR
TSSOP – PW Reel of 250 PCA9557PWT PD557
Tube of 90 PCA9557PW
TVSOP – DGV Reel of 2000 PCA9557DGVR PD557
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
TERMINAL FUNCTIONS
NO.
QFN (RGY)
SOIC (D),
NAME DESCRIPTION
SSOP (DB),
QFN (RGV)
TSSOP (PW),
AND
TVSOP (DGV)
1 15 SCL Serial clock bus. Connect to V
CC
through a pullup resistor.
2 16 SDA Serial data bus. Connect to V
CC
through a pullup resistor.
3 1 A0 Address input. Connect directly to V
CC
or ground.
4 2 A1 Address input. Connect directly to V
CC
or ground.
5 3 A2 Address input. Connect directly to V
CC
or ground.
P-port input/output. High impedance open-drain design structure. Connect to V
CC
6 4 P0
through a pullup resistor.
7 5 P1 P-port input/output. Push-pull design structure.
8 6 GND Ground
9 7 P2 P-port input/output. Push-pull design structure.
10 8 P3 P-port input/output. Push-pull design structure.
11 9 P4 P-port input/output. Push-pull design structure.
12 10 P5 P-port input/output. Push-pull design structure.
13 11 P6 P-port input/output. Push-pull design structure.
14 12 P7 P-port input/output. Push-pull design structure.
Active-low reset input. Connect to V
CC
through a pullup resistor if no active
15 13 RESET
connection is used.
16 14 V
CC
Supply voltage
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