Datasheet

RegisterDescriptions
Power-OnReset
PCA9555
www.ti.com .........................................................................................................................................................SCPS131E–AUGUST2005–REVISEDMAY2008
TheInputPortregisters(registers0and1)reflecttheincominglogiclevelsofthepins,regardlessofwhetherthe
pinisdefinedasaninputoranoutputbytheConfigurationregister.Itonlyactsonreadoperation.Writesto
theseregistershavenoeffect.Thedefaultvalue,X,isdeterminedbytheexternallyappliedlogiclevel.
Beforeareadoperation,awritetransmissionissentwiththecommandbytetoindicatetothetheI
2
Cdevicethat
theInputPortregisterwillbeaccessednext.
Registers0and1(InputPortRegisters)
BitI0.7I0.6I0.5I0.4I0.3I0.2I0.1I0.0
DefaultXXXXXXXX
BitI1.7I1.6I1.5I1.4I1.3I1.2I1.1I1.0
DefaultXXXXXXXX
TheOutputPortregisters(registers2and3)showtheoutgoinglogiclevelsofthepinsdefinedasoutputsbythe
Configurationregister.Bitvaluesinthisregisterhavenoeffectonpinsdefinedasinputs.Inturn,readsfromthis
registerreflectthevaluethatisintheflip-flopcontrollingtheoutputselection,nottheactualpinvalue.
Registers2and3(OutputPortRegisters)
BitO0.7O0.6O0.5O0.4O0.3O0.2O0.1O0.0
Default11111111
BitO1.7O1.6O1.5O1.4O1.3O1.2O1.1O1.0
Default11111111
ThePolarityInversionregisters(registers4and5)allowpolarityinversionofpinsdefinedasinputsbythe
Configurationregister.Ifabitinthisregisterisset(writtenwith1),thecorrespondingportpin'spolarityis
inverted.Ifabitinthisregisteriscleared(writtenwitha0),thecorrespondingportpin'soriginalpolarityis
retained.
Registers4and5(PolarityInversionRegisters)
BitN0.7N0.6N0.5N0.4N0.3N0.2N0.1N0.0
Default00000000
BitN1.7N1.6N1.5N1.4N1.3N1.2N1.1N1.0
Default00000000
TheConfigurationregisters(registers6and7)configurethedirectionsoftheI/Opins.Ifabitinthisregisteris
setto1,thecorrespondingportpinisenabledasaninputwithahigh-impedanceoutputdriver.Ifabitinthis
registerisclearedto0,thecorrespondingportpinisenabledasanoutput.
Registers6and7(ConfigurationRegisters)
BitC0.7C0.6C0.5C0.4C0.3C0.2C0.1C0.0
Default11111111
BitC1.7C1.6C1.5C1.4C1.3C1.2C1.1C1.0
Default11111111
Whenpower(from0V)isappliedtoV
CC
,aninternalpower-onresetholdsthePCA9555inaresetconditionuntil
V
CC
hasreachedV
POR
.Atthatpoint,theresetconditionisreleasedandthePCA9555registersandI
2
C/SMBus
statemachineinitializetotheirdefaultstates.Afterthat,V
CC
mustbeloweredtobelow0.2Vandthenbackupto
theoperatingvoltageforapower-resetcycle.
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