Datasheet

I
2
CInterface
SDA
SCL
Start Condition
S
Stop Condition
P
SDA
SCL
Data Line
Stable;
Data Valid
Change
of Data
Allowed
PCA9555
SCPS131E–AUGUST2005–REVISEDMAY2008......................................................................................................................................................... www.ti.com
ThebidirectionalI
2
Cbusconsistsoftheserialclock(SCL)andserialdata(SDA)lines.Bothlinesmustbe
connectedtoapositivesupplyviaapullupresistorwhenconnectedtotheoutputstagesofadevice.Data
transfermaybeinitiatedonlywhenthebusisnotbusy.
I
2
CcommunicationwiththisdeviceisinitiatedbyamastersendingaStartcondition,ahigh-to-lowtransitionon
theSDAinput/outputwhiletheSCLinputishigh(seeFigure1).AftertheStartcondition,thedeviceaddressbyte
issent,MSBfirst,includingthedatadirectionbit(R/W).Thisdevicedoesnotrespondtothegeneralcall
address.
Afterreceivingthevalidaddressbyte,thisdevicerespondswithanACK,alowontheSDAinput/outputduring
thehighoftheACK-relatedclockpulse.Theaddressinputs(A0–A2)oftheslavedevicemustnotbechanged
betweentheStartandStopconditions.
OntheI
2
Cbus,onlyonedatabitistransferredduringeachclockpulse.ThedataontheSDAlinemustremain
stableduringthehighpulseoftheclockperiod,aschangesinthedatalineatthistimeareinterpretedascontrol
commands(StartorStop)(seeFigure2).
AStopcondition,alow-to-hightransitionontheSDAinput/outputwhiletheSCLinputishigh,issentbythe
master(seeFigure1).
AnynumberofdatabytescanbetransferredfromthetransmittertothereceiverbetweentheStartandtheStop
conditions.EachbyteofeightbitsisfollowedbyoneACKbit.ThetransmittermustreleasetheSDAlinebefore
thereceivercansendanACKbit.ThedevicethatacknowledgesmustpulldowntheSDAlineduringtheACK
clockpulsesothattheSDAlineisstablelowduringthehighpulseoftheACK-relatedclockperiod(see
Figure3).Whenaslavereceiverisaddressed,itmustgenerateanACKaftereachbyteisreceived.Similarly,
themastermustgenerateanACKaftereachbytethatitreceivesfromtheslavetransmitter.Setupandhold
timesmustbemettoensureproperoperation.
Amasterreceiversignalsanendofdatatotheslavetransmitterbynotgeneratinganacknowledge(NACK)after
thelastbytehasbeenclockedoutoftheslave.ThisisdonebythemasterreceiverbyholdingtheSDAlinehigh.
Inthisevent,thetransmittermustreleasethedatalinetoenablethemastertogenerateaStopcondition.
Figure1.DefinitionofStartandStopConditions
Figure2.BitTransfer
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