Datasheet

Reads
A20
1S 00 A1 A0 0 A A
Data from Register
Slave Address
Slave Address
R/W
ACK From
Slave
Command Byte
ACK From
Slave
S
A20 1 00 A1 A0
R/W
1 A Data
A
ACK From
Master
Data
Data from Register
NACK From
Master
NA
P
Last Byte
ACK From
Slave
SCL
SD
A
INT
Start
Condition
R/W
Read From
P
ort
Data Into
Port
Stop
Condition
ACK From
Master
NACK From
Master
ACK From
Slave
Data From Port
Slave Address Data From Port
1
98765432
A2
0
1
S
00
A1
A0
1
A
Data 1 Data 4
A
NA
P
Data 2 Data 3 Data 4
t
iv
t
ph
t
ps
t
ir
Data 5
PCA9554
SCPS128B–JULY2006–REVISEDAUGUST2008........................................................................................................................................................ www.ti.com
ThebusmasterfirstmustsendthePCA9554addresswiththeleast-significantbitsettoalogic0(seeFigure4
fordeviceaddress).Thecommandbyteissentaftertheaddressanddetermineswhichregisterisaccessed.
Afterarestart,thedeviceaddressissentagainbut,thistime,theleast-significantbitissettoalogic1.Data
fromtheregisterdefinedbythecommandbytethenissentbythePCA9554(seeFigure8andFigure9).Aftera
restart,thevalueoftheregisterdefinedbythecommandbytematchestheregisterbeingaccessedwhenthe
restartoccurred.DataisclockedintotheregisterontherisingedgeoftheACKclockpulse.Thereisnolimitation
onthenumberofdatabytesreceivedinonereadtransmission,butwhenthefinalbyteisreceived,thebus
mastermustnotacknowledgethedata
Figure8.ReadFromRegister
<br/>
A.Thisfigureassumesthecommandbytehaspreviouslybeenprogrammedwith00h.
B.TransferofdatacanbestoppedatanymomentbyaStopcondition.
C.Thisfigureeliminatesthecommandbytetransfer,arestart,andslaveaddresscallbetweentheinitialslaveaddress
callandactualdatatransferfromPport.SeeFigure8forthesedetails.
Figure9.ReadFromInputPortRegister
10SubmitDocumentationFeedbackCopyright©2006–2008,TexasInstrumentsIncorporated
ProductFolderLink(s):PCA9554
Not Recommended for New Designs