Datasheet

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DeviceAddress
1 1 1 0 A1A2 A0
Slave Address
R/W
Fixed
Hardware
Selectable
ControlRegister
PCA9548A
8-CHANNELI
2
CSWITCH
WITHRESET
SCPS143C–OCTOBER2006–REVISEDJUNE2007
Figure4showstheaddressbyteofthePCA9548A.
Figure4.PCA9548AAddress
AddressReference
INPUTS
I
2
CBUSSLAVEADDRESS
A2A1A0
LLL112(decimal),70(hexadecimal)
LLH113(decimal),71(hexadecimal)
LHL114(decimal),72(hexadecimal)
LHH115(decimal),73(hexadecimal)
HLL116(decimal),74(hexadecimal)
HLH117(decimal),75(hexadecimal)
HHL118(decimal),76(hexadecimal)
HHH119(decimal),77(hexadecimal)
Thelastbitoftheslaveaddressdefinestheoperation(readorwrite)tobeperformed.Whenitishigh(1),aread
isselected,whilealow(0)selectsawriteoperation.
Followingthesuccessfulacknowledgmentoftheaddressbyte,thebusmastersendsacommandbytethatis
storedinthecontrolregisterinthePCA9548A(seeFigure5).ThisregistercanbewrittenandreadviatheI
2
C
bus.EachbitinthecommandbytecorrespondstoaSCn/SDnchannelandahigh(or1)selectsthischannel.
MultipleSCn/SDnchannelsmaybeselectedatthesametime.Whenachannelisselected,thechannel
becomesactiveafterastopconditionhasbeenplacedontheI
2
Cbus.ThisensuresthatallSCn/SDnlinesare
inahighstatewhenthechannelismadeactive,sothatnofalseconditionsaregeneratedatthetimeof
connection.Astopconditionalwaysmustoccurimmediatelyaftertheacknowledgecycle.Ifmultiplebytesare
receivedbythePCA9548A,itsavesthelastbytereceived.
6
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