Datasheet

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I
2
CInterface
PCA9548A
8-CHANNELI
2
CSWITCH
WITHRESET
SCPS143C–OCTOBER2006–REVISEDJUNE2007
TERMINALFUNCTIONS
NO.
SOIC(DW),
NAMEDESCRIPTION
SSOP(DB),
QFN(RGE)
TSSOP(PW),AND
TVSOP(DGV)
122A0Addressinput0.ConnectdirectlytoV
CC
orground.
223A1Addressinput1.ConnectdirectlytoV
CC
orground.
324RESET Active-lowresetinput.ConnecttoV
CC
throughapullupresistor,ifnotused.
41SD0Serialdata0.ConnecttoV
CC
throughapullupresistor.
52SC0Serialclock0.ConnecttoV
CC
throughapullupresistor.
63SD1Serialdata1.ConnecttoV
CC
throughapullupresistor.
74SC1Serialclock1.ConnecttoV
CC
throughapullupresistor.
85SC2Serialdata2.ConnecttoV
CC
throughapullupresistor.
96SC2Serialclock2.ConnecttoV
CC
throughapullupresistor.
107SD3Serialdata3.ConnecttoV
CC
throughapullupresistor.
118SC3Serialclock3.ConnecttoV
CC
throughapullupresistor.
129GNDGround
1310SD4Serialdata4.ConnecttoV
CC
throughapullupresistor.
1411SC4Serialclock4.ConnecttoV
CC
throughapullupresistor.
1512SD5Serialdata5.ConnecttoV
CC
throughapullupresistor.
1613SC5Serialclock5.ConnecttoV
CC
throughapullupresistor.
1714SD6Serialdata6.ConnecttoV
CC
throughapullupresistor.
1815SC6Serialclock6.ConnecttoV
CC
throughapullupresistor.
1916SD7Serialdata7.ConnecttoV
CC
throughapullupresistor.
2017SC7Serialclock7.ConnecttoV
CC
throughapullupresistor.
2118A2Addressinput2.ConnectdirectlytoV
CC
orground.
2219SCLSerialclockbus.ConnecttoV
CC
throughapullupresistor.
2320SDASerialdatabus.ConnecttoV
CC
throughapullupresistor.
2421V
CC
Supplyvoltage
ThebidirectionalI
2
Cbusconsistsoftheserialclock(SCL)andserialdata(SDA)lines.Bothlinesmustbe
connectedtoapositivesupplythroughapullupresistorwhenconnectedtotheoutputstagesofadevice.Data
transfermaybeinitiatedonlywhenthebusisnotbusy.
I
2
Ccommunicationwiththisdeviceisinitiatedbyamastersendingastartcondition,ahigh-to-lowtransitionon
theSDAinput/outputwhiletheSCLinputishigh(seeFigure1).Afterthestartcondition,thedeviceaddress
byteissent,mostsignificantbit(MSB)first,includingthedatadirectionbit(R/W).
Afterreceivingthevalidaddressbyte,thisdevicerespondswithanacknowledge(ACK),alowontheSDA
input/outputduringthehighoftheACK-relatedclockpulse.Theaddressinputs(A0–A2)oftheslavedevice
mustnotbechangedbetweenthestartandthestopconditions.
OntheI
2
Cbus,onlyonedatabitistransferredduringeachclockpulse.ThedataontheSDAlinemustremain
stableduringthehighpulseoftheclockperiod,aschangesinthedatalineatthistimeareinterpretedascontrol
commands(startorstop)(seeFigure2).
Astopcondition,alow-to-hightransitionontheSDAinput/outputwhiletheSCLinputishigh,issentbythe
master(seeFigure1).
4
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