Datasheet

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INT
A0
A1
PCA9543A
RESET
SC1
6
10
5
9
7
14
3
13
12
1
2
11
SC0
SD0
SD1
GND
V
CC
SCL
SDA
INT1
INT0
InputFilter
OutputFilter
I CBus
Control
2
InterruptLogic
SwitchControlLogic
Power-On
Reset
4
8
Device Address
A1 A0
1
1 1
Fixed Hardware
selectable
0 0 R/W
PCA9543A
TWO-CHANNEL I
2
C-BUS SWITCH
WITH INTERRUPT LOGIC AND RESET
SCPS169 – SEPTEMBER 2007
BLOCK DIAGRAM
Figure 1. Block Diagram
Following a start condition, the bus master must output the address of the slave it is accessing. The address of
the PCA9543A is shown in Figure 2 . To conserve power, no internal pullup resistors are incorporated on the
hardware-selectable address pins and they must be pulled high or low.
Figure 2. Slave Address PCA9543A
The last bit of the slave address defines the operation to be performed. When set to a logic 1, a read is selected,
while a logic 0 selects a write operation.
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