Datasheet
www.ti.com
I
2
C Interface Timing Requirements
PCA9543A
TWO-CHANNEL I
2
C-BUS SWITCH
WITH INTERRUPT LOGIC AND RESET
SCPS169 – SEPTEMBER 2007
Electrical Characteristics (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
SDA 11 13
C
io(OFF)
(3)
V
I
= V
CC
or GND, Switch OFF 2.3 V to 5.5 V pF
SC1 – SC0, SD1 – SD0 6 8
4.5 V to 5.5 V 4 9 20
V
O
= 0.4 V, I
O
= 15 mA
r
on
Switch on-state resistance 3 V to 3.6 V 5 11 25 Ω
V
O
= 0.4 V, I
O
= 10 mA 2.3 V to 2.7 V 7 16 50
(3) C
io(ON)
depends on the device capacitance and load that is downstream from the device.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 11 )
STANDARD MODE FAST MODE
I
2
C BUS I
2
C BUS
UNIT
MIN MAX MIN MAX
f
scl
I
2
C clock frequency 0 100 0 400 kHz
t
sch
I
2
C clock high time 4 0.6 μ s
t
scl
I
2
C clock low time 4.7 1.3 μ s
t
sp
I
2
C spike time 50 50 ns
t
sds
I
2
C serial-data setup time 250 100 ns
t
sdh
I
2
C serial-data hold time 0
(1)
0
(1)
μ s
t
icr
I
2
C input rise time 1000 20 + 0.1C
b
(2)
300 ns
t
icf
I
2
C input fall time 300 20 + 0.1C
b
(2)
300 ns
t
ocf
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2
C output fall time 10-pF to 400-pF bus 300 20 + 0.1C
b
(2)
300 ns
t
buf
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2
C bus free time between stop and start 4.7 1.3 μ s
t
sts
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2
C start or repeated start condition setup 4.7 0.6 μ s
t
sth
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2
C start or repeated start condition hold 4 0.6 μ s
t
sps
I
2
C stop condition setup 4 0.6 μ s
t
vdL(Data)
Valid-data time (high to low)
(3)
SCL low to SDA output low valid 1 1 μ s
t
vdH(Data)
Valid-data time (low to high)
(3)
SCL low to SDA output high valid 0.6 0.6 μ s
ACK signal from SCL low
t
vd(ack)
Valid-data time of ACK condition 1 1 μ s
to SDA output low
C
b
I
2
C bus capacitive load 400 400 pF
(1) A device internally must provide a hold time of at least 300 ns for the SDA signal (referred to as the V
IH
min of the SCL signal), in order
to bridge the undefined region of the falling edge of SCL.
(2) C
b
= total bus capacitance of one bus line in pF
(3) Data taken using a 1-k Ω pullup resistor and 50-pF load (see Figure 11 )
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