Datasheet

Data Output
by Transmitter
SCL From
Master
Start
Condition
S
1 2 8 9
Data Output
by Receiver
Clock Pulse for
Acknowledgment
NACK
ACK
Device Address
1 1 1 0 A10 A0
Slave Address
R/W
Fixed
Hardware
Selectable
PCA9538
SCPS126E – SEPTEMBER 2006 – REVISED JUNE 2008 ................................................................................................................................................ www.ti.com
Figure 3. Acknowledgment on I
2
C Bus
Interface Definition Table
BIT
BYTE
7 (MSB) 6 5 4 3 2 1 0 (LSB)
I
2
C slave address H H H L L A1 A0 R/ W
Px I/O data bus P7 P6 P5 P4 P3 P2 P1 P0
Figure 4 shows the address byte of the PCA9538.
Figure 4. PCA9538 Address
Address Reference Table
INPUTS
I
2
C BUS SLAVE ADDRESS
A1 A0
L L 112 (decimal), 70 (hexadecimal)
L H 113 (decimal), 71 (hexadecimal)
H L 114 (decimal), 72 (hexadecimal)
H H 115 (decimal), 73 (hexadecimal)
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