Datasheet

Bus Transactions
Writes
Data101 0S 00 0 1 0 A 1000000 A A P
SCL
SDA
Data to
Register
Start Condition R/W ACK From Slave ACK From Slave ACK From Slave
1 98765432
Data to RegisterCommand ByteSlave Address
PCA9536
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....................................................................................................................................................... SCPS125F APRIL 2006 REVISED AUGUST 2008
Data is exchanged between the master and PCA9536 through write and read commands.
Data is transmitted to the PCA9536 by sending the device address and setting the least-significant bit (LSB) to a
logic 0 (see Figure 4 for device address). The command byte is sent after the address and determines which
register receives the data that follows the command byte. There is no limitation on the number of data bytes sent
in one write transmission (see Figure 6 and Figure 7 ).
Figure 6. Write to Output Port Register
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Figure 7. Write to Configuration or Polarity Inversion Registers
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Product Folder Link(s): PCA9536