Datasheet

Device Address
1 0
Slave Address
R/W
Fixed
10000
Control Register and Command Byte
0 0 0 0 B1 B000
PCA9536
www.ti.com ....................................................................................................................................................... SCPS125F – APRIL 2006 – REVISED AUGUST 2008
Interface Definition
BIT
BYTE
7 (MSB) 6 5 4 3 2 1 0 (LSB)
I
2
C slave address H L L L L L H R/ W
Does not affect operation of the PCA9536
Px I/O data bus P3 P2 P1 P0
P7 P6 P5 P4
Figure 4 shows the address byte of the PCA9536.
Figure 4. PCA9536 Address
The slave address equates to 65 (decimal) and 41 (hexadecimal).
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read
is selected, while a low (0) selects a write operation.
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the PCA9536. Two bits of this data byte state the operation (read or write) and
the internal register (Input, Output, Polarity Inversion, or Configuration) that will be affected. This register can be
written or read through the I
2
C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a
new command byte has been sent.
Figure 5. Control Register Bits
Command Byte
CONTROL REGISTER BITS
COMMAND BYTE POWER-UP
REGISTER PROTOCOL
(HEX) DEFAULT
B1 B0
0 0 0x00 Input Port Read byte 1111 XXXX
0 1 0x01 Output Port Read/write byte 1111 1111
1 0 0x02 Polarity Inversion Read/write byte 0000 0000
1 1 0x03 Configuration Read/write byte 1111 1111
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