Datasheet

DGK PACKAGE
(TOP VIEW)
1
2
3
4
V
CC
SCL1
SDA1
EN
NC
SCL0
SDA0
GND
8
7
6
5
NC No internal connection–
PCA9515B
www.ti.com SCPS232A –MARCH 2012–REVISED MAY 2013
DUAL BIDIRECTIONAL I
2
C BUS AND SMBus REPEATER
Check for Samples: PCA9515B
1
FEATURES
• Two-Channel Bidirectional Buffers – 2000-V Human-Body Model (A114-A)
• I
2
C Bus and SMBus Compatible – 200-V Machine Model (A115-A)
• Active-High Repeater-Enable Input – 1000-V Charged-Device Model (C101)
• Open-Drain I
2
C I/O
• 5.5-V Tolerant I
2
C I/O and Enable Input Support
Mixed-Mode Signal Operation
• Lockup-Free Operation
• Accommodates Standard Mode, Fast Mode I
2
C
Devices, and Multiple Masters
• Supports Arbitration and Clock Stretching
Across Repeater
• Powered-Off High-Impedance I
2
C Pins
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class I
• ESD Protection Exceeds JESD 22
DESCRIPTION
The PCA9515B is a BiCMOS integrated circuit intended for I
2
C bus and SMBus systems applications. The
device contains two identical bidirectional open-drain buffer circuits that enables I
2
C and similar bus systems to
be extended without degrading system performance. The dual bidirectional I
2
C buffer is operational at 2.3-V to
3.6-V V
CC
.
The PCA9515B buffers both the serial data (SDA) and serial clock (SCL) signals on the I
2
C bus, while retaining
all the operating modes and features of the I
2
C system. This feature allows two buses, of 400-pF bus
capacitance, to be connected in an I
2
C application.
The I
2
C bus capacitance limit of 400 pF restricts the number of interfaced devices and bus length. Using the
PCA9515B, a system designer can isolate two halves of a bus, thus accommodating more I
2
C devices or longer
trace lengths.
The PCA9515B has an active-high enable (EN) input with an internal pull-up. This allows users to select when
the repeater is active and isolate malfunctioning slaves on power-up reset. States should never be changed
during an I
2
C operation. Disabling during a bus operation will hang the bus and enabling part way through a bus
cycle may confuse the I
2
C parts being enabled. The EN input should only change state when the global bus and
the repeater port are in an idle state to prevent system failures.
The PCA9515B can also be used to operate two buses, one at 5-V interface levels and the other at 3.3-V
interface levels. The buses may also function at 400-kHz or 100-kHz operating frequency. If the two buses are
operating at different frequencies, the 100-kHz bus must be isolated if the operation of the 400-kHz bus is
required. If the master is running at 400-kHz, the maximum system operating frequency may be less than
400 kHz due to the delays added by the repeater.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2012–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.