Datasheet

SDA1
V
REF1
= 1.8 V
V
DPU
= 3.3 V
I
2
C Bus
Master
PCA9306
I
2
C Bus
Device
1
2
3
4
5
6
7
8
SCL1
SCL2
SDA2
V
REF1
V
REF2
EN
R
PU
R
PU
200 kΩ
V
CC
SDA
SCL
SW
SW
SCL
SDA
V
CC
R
PU
R
PU
GND
GND
GND
3.3-V Enable Signal
Off
On
PCA9306
SCPS113J –OCTOBER 2004–REVISED OCTOBER 2010 www.ti.com
Figure 3. Typical Application Circuit (Switch Enable Control)
Bidirectional Translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the EN input must be connected to V
REF2
and both pins pulled to high-side V
DPU
through a pullup resistor
(typically 200 kΩ). This allows V
REF2
to regulate the EN input. A filter capacitor on V
REF2
is recommended. The
I
2
C bus master output can be totem pole or open drain (pullup resistors may be required) and the I
2
C bus device
output can be totem pole or open drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to
V
DPU
). However, if either output is totem pole, data must be unidirectional or the outputs must be 3-stateable and
be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If both
outputs are open drain, no direction control is needed.
The reference supply voltage (V
REF1
) is connected to the processor core power-supply voltage.
Application Operating Conditions
see Figure 2
MIN TYP
(1)
MAX UNIT
V
REF2
Reference voltage V
REF1
+ 0.6 2.1 5 V
EN Enable input voltage V
REF1
+ 0.6 2.1 5 V
V
REF1
Reference voltage 0 1.5 4.4 V
I
PASS
Pass switch current 14 mA
I
REF
Reference-transistor current 5 mA
T
A
Operating free-air temperature –40 85 °C
(1) All typical values are at T
A
= 25°C.
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