Datasheet

3.0 AC Electrical Characteristics (Continued)
Symbol Parameter Conditions Min Max Units
Transmitter
t
HR
Delay from WR, WR (WR THR) 100 pF Load
175 ns
to Reset Interrupt
t
IR
Delay from RD, RD (RD IIR) to Reset 100 pF Load
250 ns
Interrupt (THRE)
t
IRS
Delay from Initial INTR Reset to Transmit
824
BAUDOUT
Start Cycles
t
SI
Delay from Initial Write to Interrupt (Note 1)
16 24
BAUDOUT
Cycles
t
STI
Delay from Stop to Interrupt (THRE) (Note 1)
88
BAUDOUT
Cycles
t
SXA
Delay from Start to TXRDY active 100 pF Load
8
BAUDOUT
Cycles
t
WXI
Delay from Write to TXRDY inactive 100 pF Load 195 ns
Modem Control
t
MDO
Delay from WR, WR (WR MCR) to 100 pF Load
200 ns
Output
t
RIM
Delay from RD, RD to Reset Interrupt 100 pF Load
250 ns
(RD MSR)
t
SIM
Delay from MODEM Input to Set Interrupt 100 pF Load 250 ns
Note 1: This delay will be lengthened by 1 character time, minus the last stop bit time if the transmitter interrupt delay circuit is active. (See FIFO Interrupt Mode
Operation).
Note 2: These specifications are preliminary.
4.0 Timing Waveforms (All timings are referenced to valid 0 and valid 1)
External Clock Input (24.0 MHz Max.)
TL/C/8652–2
AC Test Points
TL/C/8652–3
Note 1: The 2.4V and 0.4V levels are the voltages that the inputs are driven to during AC testing.
Note 2: The 2.0V and 0.8V levels are the voltages at which the timing tests are made.
BAUDOUT Timing
TL/C/8652–4
5