Datasheet
TABLE II. Summary of Registers
Register Address
0 DLAB
e
0 0 DLAB
e
0 1 DLAB
e
0 2 2 3 4 5 6 7 0 DLAB
e
1 1 DLAB
e
1
Bit
Receiver Transmitter Interrupt FIFO
No.
Buffer Holding Interrupt Ident. Control Line MODEM Line MODEM Scratch Divisor Divisor
Register Register Enable Register Register Control Control Status Status Reg- Latch Latch
(Read (Write Register (Read (Write Register Register Register Register ister (LS) (MS)
Only) Only) Only) Only)
RBR THR IER IIR FCR LCR MCR LSR MSR SCR DLL DLM
0 Data Bit 0 Data Bit 0 Enable ‘‘0’’ if FIFO Word Data Data Delta Bit 0 Bit 0 Bit 8
(Note 1) Received Interrupt Enable Length Terminal Ready Clear
Data Pending Select Ready (DR) to Send
Available Bit 0 (DTR) (DCTS)
Interrupt (WLS0)
(ERBFI)
1 Data Bit 1 Data Bit 1 Enable Interrupt RCVR Word Request Overrun Delta Bit 1 Bit 1 Bit 9
Transmitter ID FIFO Length to Send Error Data
Holding Bit (0) Reset Select (RTS) (OE) Set
Register Bit 1 Ready
Empty (WLS1) (DDSR)
Interrupt
(ETBEI)
2 Data Bit 2 Data Bit 2 Enable Interrupt XMIT Number of Out 1 Parity Trailing Bit 2 Bit 2 Bit 10
Receiver ID FIFO Stop Bits Error Edge Ring
Line Status Bit (1) Reset (STB) (PE) Indicator
Interrupt (TERI)
(ELSI)
3 Data Bit 3 Data Bit 3 Enable Interrupt DMA Parity Out 2 Framing Delta Bit 3 Bit 3 Bit 11
MODEM ID Mode Enable Error Data
Status Bit (2) Select (PEN) (FE) Carrier
Interrupt (Note 2) Detect
(EDSSI) (DDCD)
4 Data Bit 4 Data Bit 4 0 0 Reserved Even Loop Break Clear Bit 4 Bit 4 Bit 12
Parity Interrupt to
Select (BI) Send
(EPS) (CTS)
5 Data Bit 5 Data Bit 5 0 0 Reserved Stick 0 Transmitter Data Bit 5 Bit 5 Bit 13
Parity Holding Set
Register Ready
(THRE) (DSR)
6 Data Bit 6 Data Bit 6 0 FIFOs RCVR Set 0 Transmitter Ring Bit 6 Bit 6 Bit 14
Enabled Trigger Break Empty Indicator
(Note 2) (LSB) (TEMT) (RI)
7 Data Bit 7 Data Bit 7 0 FIFOs RCVR Divisor 0 Error in Data Bit 7 Bit 7 Bit 15
Enabled Trigger Latch RCVR Carrier
(Note 2) (MSB) Access Bit FIFO Detect
(DLAB) (Note 2) (DCD)
Note 1: Bit 0 is the least significant bit. It is the first bit serially transmitted or received.
Note 2: These bits are always 0 in the 16450 Mode.
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