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Sx
Lx
Sy
Ly
R2R1
R3
SDA
SCL
V =5V
CC
BufferedBus
R4
SDA
SCL
V =5V
CC
SDA
SCL
I C3
2
I C2
2
I C1
2
Lx
Sx
Ly
Sy
Lx
Sx
Ly
Sy
Calculating Bus Drive Currents
P82B715
I
2
C BUS EXTENDER
SCPS145A – DECEMBER 2007 – REVISED FEBRUARY 2008
This arrangement, using multiple pullups as shown in Figure 4 , provides the best system performance and allows
stand-alone operation of individual I
2
C buses if parts of the extended system are disconnected or reconnected.
For each bus section, the pullup resistor is calculated as:
R = 1 µ s/(C
device
+ C
wiring
)
Where:
C
device
= Sum of any connected device capacitances
C
wiring
= Total wiring and stray capacitance on the bus section
The 1 µ s is an approximation with a safety factor to the theoretical time constant necessary to meet the specified
1- µ s bus rise-time specification in a system with variable logic thresholds, where the CMOS limits of 30% and
70% of V
CC
apply. The calculated value is 1.18 µ s.
If these capacitances cannot be measured or calculated, an approximation can be made by assuming that each
device presents 10 pF of load capacitance and 10 pF of trace capacitance, and that cables range from 50 pF to
100 pF per meter.
Figure 4. Single Pullup Buffered Bus
If only a single pullup is used, it must be placed on the buffered bus (as R2 in Figure 4 ,) and the associated total
system capacitance calculated by combining the individual bus capacitances into an equivalent capacitive
loading on the buffered bus.
This equivalent capacitance is the sum of the capacitance on the buffered bus plus ten times the sum of the
capacitances on all the connected I
2
C nodes. The calculated value should not exceed 4 nF. The single buffered
bus pullup resistor is then calculated to achieve the 1- µ s rise time, and it provides the pullup for the buffered bus
and for all other connected I
2
C bus nodes included in the calculation.
Figure 4 shows three P82B715 devices connected to a common buffered bus. The associated bus capacitances
are omitted for clarity, but assume the resistors have been selected to give R-C products of less than 1 µ s so the
bus rise-time requirement is satisfied. An I
2
C device connected at I
2
C 1 and holding the SDA bus low must sink
the current flowing in its local pullup R1, plus, with assistance from the P82B715, the currents in R2, R3, and R4.
Because the resistors R3 and R4 act to pull the bus nodes I
2
C 2 and I
2
C 3 and their corresponding Sx pins to a
voltage higher than the voltage at the Lx pins, their buffer amplifiers are inactive. The SDA at Sx of I
2
C 2 and I
2
C
3 is pulled low by the low at Lx via the internal 30- Ω resistor that links Lx to Sx. So the effective current that must
be sunk by the P82B715 buffer on I
2
C 1 at its Lx pin is the sum of the currents in R2, R3, and R4. The Sx current
that must be sunk by an I
2
C device at I
2
C 1 due to the buffer gain action is 1/10 of the Lx current. So the
effective pullup determining the current to be sunk by an I
2
C device at I
2
C 1 is R1 in parallel with resistors ten
times the values of R2, R3, and R4. If R1 = R3 = R4 = 10 k Ω , and R2 = 1 k Ω , the effective pullup load at I
2
C 1 is
10 k Ω ||10 k Ω ||100 k Ω ||100 k Ω = 4.55 k Ω .
The same calculation applies for I
2
C 2 or I
2
C 3.
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