Datasheet

OPA890
www.ti.com SBOS369B –MAY 2007–REVISED DECEMBER 2009
BOARD LAYOUT GUIDELINES
with a low parasitic capacitance shunting the
external resistors, excessively high resistor
Achieving optimum performance with a
values can create significant time constants that
high-frequency amplifier such as the OPA890
can degrade performance. Good axial metal film
requires careful attention to board layout parasitics
or surface-mount resistors have approximately
and external component types. Recommendations
0.2pF in shunt with the resistor. For resistor
that optimize performance include the following:
values > 1.5kΩ, this parasitic capacitance can
a. Minimize parasitic capacitance to any ac
add a pole and/or zero below 500MHz that can
ground for all of the signal I/O pins. Parasitic
effect circuit operation. Keep resistor values as
capacitance on the output and inverting input pins
low as possible consistent with load driving
can cause instability; on the noninverting input, it
considerations. The 750Ω feedback used in the
can react with the source impedance to cause
Typical Characteristics is a good starting point for
unintentional bandlimiting. To reduce unwanted
design. Note that a direct short is suggested for
capacitance, a window around the signal I/O pins
the unity-gain follower application.
should be opened in all of the ground and power
d. Connections to other wideband devices on the
planes around those pins. Otherwise, ground and
board may be made with short, direct traces or
power planes should be unbroken elsewhere on
through onboard transmission lines. For short
the board.
connections, consider the trace and the input to
b. Minimize the distance (< 0.25") from the
the next device as a lumped capacitive load.
power-supply pins to high-frequency 0.1μF
Relatively wide traces (50mils to 100mils) should
decoupling capacitors. At the device pins, the
be used, preferably with ground and power
ground and power-plane layout should not be in
planes opened up around them. Estimate the
close proximity to the signal I/O pins. Avoid
total capacitive load and set R
S
from the plot of
narrow power and ground traces to minimize
Recommended R
S
vs Capacitive Load. Low
inductance between the pins and the decoupling
parasitic capacitive loads (< 5pF) may not need
capacitors. The power-supply connections should
an R
S
because the OPA890 is nominally
always be decoupled with these capacitors. An
compensated to operate with a 2pF parasitic
optional supply decoupling capacitor (0.1μF)
load. Higher parasitic capacitive loads without an
across the two power supplies (for bipolar
R
S
are allowed as the signal gain increases
operation) will improve 2nd-harmonic distortion
(increasing the unloaded phase margin). If a long
performance. Larger (2.2μF to 6.8μF) decoupling
trace is required, and the 6dB signal loss intrinsic
capacitors, effective at lower frequencies, should
to a doubly-terminated transmission line is
also be used on the main supply pins. These
acceptable, implement a matched impedance
capacitors may be placed somewhat farther from
transmission line using microstrip or stripline
the device and may be shared among several
techniques (consult an ECL design handbook for
devices in the same area of the PCB.
microstrip and stripline layout techniques). A 50Ω
environment is normally not necessary on the
c. Careful selection and placement of external
board, and in fact, a higher impedance
components preserves the high-frequency
environment will improve distortion as shown in
performance of the OPA890. Resistors should
the distortion versus load plots. With a
be a very low reactance type. Surface-mount
characteristic board trace impedance defined
resistors work best and allow a tighter overall
(based on board material and trace dimensions),
layout. Metal film or carbon composition
a matching series resistor into the trace from the
axially-leaded resistors can also provide good
output of the OPA890 is used as well as a
high-frequency performance. Again, keep the
terminating shunt resistor at the input of the
leads and PCB traces as short as possible. Never
destination device. Remember also that the
use wirewound type resistors in a high-frequency
terminating impedance is the parallel combination
application. Because the output pin and inverting
of the shunt resistor and the input impedance of
input pin are the most sensitive to parasitic
the destination device; this total effective
capacitance, always position the feedback and
impedance should be set to match the trace
series output resistor, if any, as close as possible
impedance. The high output voltage and current
to the output pin. Other network components,
capability of the OPA890 allows multiple
such as noninverting input termination resistors,
destination devices to be handled as separate
should also be placed close to the package.
transmission lines, each with its respective series
Where double-side component mounting is
and shunt terminations. If the 6dB attenuation of
allowed, place the feedback resistor directly
a doubly-terminated transmission line is
under the package on the other side of the board
unacceptable, a long trace can be
between the output and inverting input pins. Even
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