Datasheet

OPA890
50W
R
F
750W
R
G
324W
R
B
240W
R
M
59W
Source
DIS
+5V
-5V
R
O
50W
0.1 Fm 6.8 Fm
+
0.1 Fm
0.1 Fm
6.8 Fm
+
50 LoadW
0.1 Fm
OPA890
SBOS369B –MAY 2007–REVISED DECEMBER 2009 www.ti.com
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
ADC—including additional external capacitance that
may be recommended to improve ADC linearity. A
high-speed, high open-loop gain amplifier such as the
OPA890 can be very susceptible to decreased
stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin.
When the amplifier open-loop output resistance is
considered, this capacitive load introduces an
additional pole in the signal path that can decrease
the phase margin. Several external solutions to this
problem have been suggested. When the primary
considerations are frequency response flatness,
pulse response fidelity, and/or distortion, the simplest
and most effective solution is to isolate the capacitive
Figure 51. Gain of –2V/V Example Circuit
load from the feedback loop by inserting a
series-isolation resistor between the amplifier output
The second major consideration, touched on in the
and the capacitive load. This solution does not
previous paragraph, is that the signal source
eliminate the pole from the loop response, but rather
impedance becomes part of the noise gain equation
shifts it and adds a zero at a higher frequency. The
and influences the bandwidth. For the example in
additional zero acts to reduce the phase lag from the
Figure 51, the R
M
value combines in parallel with the
capacitive load pole, thus increasing the phase
external 50Ω source impedance, yielding an effective
margin and improving stability.
driving impedance of 50Ω 59Ω = 27Ω. This
The Typical Characteristics show the recommended
impedance is added in series with R
G
for calculating
R
S
versus capacitive load and the resulting frequency
the noise gain (NG). The resulting NG is 3.14V/V for
response at the load. Parasitic capacitive loads
Figure 51, as opposed to only 2 if R
M
could be
greater than 2pF can begin to degrade the
eliminated as discussed previously. The bandwidth is
performance of the OPA890. Long PCB traces,
therefore slightly lower for the gain of –2V/V circuit of
unmatched cables, and connections to multiple
Figure 51 than for the gain of +2V/V circuit of
devices can easily exceed this value. Always
Figure 46.
consider this effect carefully, and add the
The third important consideration in inverting amplifier
recommended series resistor as close as possible to
design is setting the bias current cancellation resistor
the OPA890 output pin (see the Board Layout
on the noninverting input (R
B
). If this resistor is set
Guidelines section).
equal to the total dc resistance looking out of the
inverting node, the output dc error (because of the
NOISE PERFORMANCE
input bias currents) is reduced to (Input Offset
The input-referred voltage noise, and the two
Current) × R
F
. If the 50Ω source impedance is
input-referred current noise terms, combine to give
dc-coupled in Figure 51, the total resistance to
low output noise under a wide variety of operating
ground on the inverting input is 351Ω. Combining this
conditions. Figure 52 shows the op amp noise
resistance in parallel with the feedback resistor gives
analysis model with all the noise terms included. In
the value of R
B
= 240Ω used in this example. To
this model, all noise terms are taken to be noise
reduce the additional high-frequency noise introduced
voltage or current density terms in either nV/√Hz or
by this resistor, it is sometimes bypassed with a
pA/√Hz.
capacitor. As long as R
B
< 350Ω, a capacitor is not
required because the total noise contribution of all
other terms is less than that of the op amp input
noise voltage. As a minimum, the OPA890 requires
an R
B
value of 50Ω to damp out parasitic-induced
peaking—a direct short to ground on the noninverting
input runs the risk of a very high-frequency instability
in the input stage.
20 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated
Product Folder Link(s): OPA890