Datasheet
OPA843
18
SBOS268C
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BOARD LAYOUT
Achieving optimum performance with a high-frequency am-
plifier such as the OPA843 requires careful attention to board
layout parasitics and external component types. Recommen-
dations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
all of the signal I/O pins. Parasitic capacitance on the
output and inverting input pins can cause instability: on the
noninverting input, it can react with the source impedance to
cause unintentional bandlimiting. To reduce unwanted ca-
pacitance, a window around the signal I/O pins should be
opened in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be unbro-
ken elsewhere on the board.
b) Minimize the distance (< 0.25") from the power-supply
pins to high-frequency 0.1
µF decoupling capacitors. At
the device pins, the ground and power-plane layout should
not be in close proximity to the signal I/O pins. Avoid narrow
power and ground traces to minimize inductance between
the pins and the decoupling capacitors. The power-supply
connections should always be decoupled with these capaci-
tors. Larger (2.2µF to 6.8µF) decoupling capacitors, effective
at lower frequency, should also be used on the main supply
pins. These may be placed somewhat farther from the device
and may be shared among several devices in the same area
of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high-frequency performance of
the OPA843. Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a tighter overall
layout. Metal-film and carbon composition, axially-leaded
resistors can also provide good high-frequency performance.
Again, keep their leads and PC board trace length as short
as possible. Never use wire-wound type resistors in a high-
frequency application. Since the output pin and inverting
input pin are the most sensitive to parasitic capacitance,
always position the feedback and series output resistor, if
any, as close as possible to the output pin. Other network
components, such as noninverting input termination resis-
tors, should also be placed close to the package. Where
double-feedback side component mounting is allowed, place
the feedback resistor directly under the package on the other
side of the board between the output and inverting input pins.
Even with a low parasitic capacitance shunting the external
resistors, excessively high resistor values can create signifi-
cant time constants that can degrade performance. Good
axial metal-film or surface-mount resistors have approxi-
mately 0.2pF in shunt with the resistor. For resistor values
> 1.5kΩ, this parasitic capacitance can add a pole and/or a
zero below 500MHz that can effect circuit operation. Keep
resistor values as low as possible consistent with load driving
considerations.
d) Connections to other wideband devices on the board
may be made with short, direct traces or through onboard
transmission lines. For short connections, consider the
trace and the input to the next device as a lumped capacitive
load. Relatively wide traces (50mils to 100mils) should be
used, preferably with ground and power planes opened up
around them. Estimate the total capacitive load and set R
S
from the plot of recommended
R
S
vs Capacitive Load
. Low
parasitic capacitive loads (< 5pF) may not need an R
S
since
the OPA843 is nominally compensated to operate with a 2pF
parasitic load. Higher parasitic capacitive loads without an R
S
are allowed as the signal gain increases (increasing the
unloaded phase margin). If a long trace is required, and the
6dB signal loss intrinsic to a doubly-terminated transmission
line is acceptable, implement a matched-impedance trans-
mission line using microstrip or stripline techniques (consult
an ECL design handbook for microstrip and stripline layout
techniques). A 50Ω environment is normally not necessary
on board, and in fact a higher impedance environment will
improve distortion as shown in the distortion versus load
plots. With a characteristic board trace impedance defined
based on board material and trace dimensions, a matching
series resistor into the trace from the output of the OPA843
is used as well as a terminating shunt resistor at the input of
the destination device. Remember also that the terminating
impedance will be the parallel combination of the shunt
resistor and input impedance of the destination device; this
total effective impedance should be set to match the trace
impedance. If the 6dB attenuation of a doubly-terminated
transmission line is unacceptable, a long trace can be series-
terminated at the source end only. Treat the trace as a
capacitive load in this case and set the series resistor value
as shown in the plot of
R
S
vs Capacitive Load
. This will not
preserve signal integrity as well as a doubly-terminated line.
If the input impedance of the destination device is low, there
will be some signal attenuation due to the voltage divider
formed by the series output into the terminating impedance.
e) Socketing a high-speed part like the OPA843 is not
recommended. The additional lead length and pin-to-pin
capacitance introduced by the socket can create an ex-
tremely troublesome parasitic network, which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA843
onto the board.