Datasheet

OPA843
16
SBOS268C
www.ti.com
the 2nd-harmonic 12dB and the 3rd-harmonic 18dB. Increas-
ing the signal gain will also increase the 2nd-harmonic
distortion. Again, a 6dB increase in gain will increase the
2nd- and 3rd-harmonic by 6dB even with a constant output
power and frequency. Finally, the distortion increases as the
fundamental frequency increases due to the roll off in the
loop gain with frequency. Conversely, the distortion will
improve going to lower frequencies down to the dominant
open-loop pole at approximately 3kHz. Starting from the
100dBc 2nd-harmonic for 2V
PP
into 200, G = +5 distortion
at 500kHz (from the Typical Characteristics), the 2nd-har-
monic distortion at 20kHz should be approximately:
100dB 20log (500kHz/20kHz) = 128dBc.
The OPA843 has an extremely low 3rd-order harmonic distortion.
This also gives an exceptionally good 2-tone, 3rd-order
intermodulation intercept, as shown in the Typical Characteristics.
This intercept curve is defined at the 50 load when driven through
a 50-matching resistor to allow direct comparisons to RF MMIC
devices. This network attenuates the voltage swing from the output
pin to the load by 6dB. If the OPA843 drives directly into the input
of a high-impedance device, such as an ADC, this 6dB attenuation
is not taken. Under these conditions, the intercept will increase by
a minimum of 6dBm. The intercept is used to predict the
intermodulation spurious for two closely spaced frequencies. If the
two test frequencies, f
1
and f
2
, are specified in terms of average and
delta frequency, f
O
= (f
1
+ f
2
)/2 and µf = |f
2
f
1
|/2, the two, 3rd-order,
close-in spurious tones will appear at f
O
± (3 f). The difference
between two equal test-tone power levels and these
intermodulation spurious power levels is given by 2 (IM3 P
O
)
where IM3 is the intercept taken from the typical characteristic
curve and P
O
is the power level in dBm at the 50 load for one of
the two closely spaced test frequencies. For instance, at 10MHz the
OPA843 at a gain of +5 has an intercept of 49dBm at a matched
50 load. If the full envelope of the two frequencies needs to be
2Vp-p, this requires each tone to be 4dBm. The 3rd-order
intermodulation spurious tones will then be 2 (49 4) = 90dBc
below the test-tone power level (86dBm). If this same 2Vp-p 2-
tone envelope were delivered directly into the input of an ADC
without the matching loss or loading of the 50 network, the
intercept would increase to at least 55dBm. With the same signal
and gain conditions now driving directly into a light load, the
spurious tones will then be at least 2 (55 4) = 102dBc below the
1V
PP
test-tone signal levels.
NOISE PERFORMANCE
The OPA843 complements its ultra low harmonic distortion
with low input noise terms. Both the input-referred voltage
noise, and the two input-referred current noise terms com-
bine to give a low output noise under a wide variety of
operating conditions. Figure 12 shows the op amp noise
analysis model with all the noise terms included. In this
model, all the noise terms are taken to be noise voltage or
current density terms in either nV/
Hz
or pA/
Hz
.
The total output spot noise voltage is computed as the square
root of the squared contributing terms to the output noise
voltage. This computation is adding all the contributing noise
powers at the output by superposition, and then taking the
square root to get back to a spot noise voltage. Equation 15
shows the general form for this output noise voltage using the
terms presented in Figure 12.
E E I R kTR NG I R kTR NG
O
NI BN
SS
BI F F
=+
(
)
+
(
)
+
(
)
+
22 22
44
(15)
Dividing this expression by the noise gain (NG = 1 + R
F
/R
G
)
will give the equivalent input referred spot noise voltage at
the noninverting input, as shown in Equation 16.
E E I R kTR
IR
NG
kTR
NG
NNIBN
SS
BI F F
=+
(
)
++
+
22
2
4
4
(16)
Evaluating these two equations for the OPA843 circuit pre-
sented in Figure 1 will give a total output spot noise voltage
of 12.4nV/
Hz
and an equivalent input spot noise voltage of
2.48nV/
Hz
.
DC OFFSET CONTROL
The OPA843 can provide excellent DC signal accuracy due to
its high open-loop gain, high common-mode rejection, high
power supply rejection, and low input offset voltage and bias
current offset errors. To take full advantage of this low input
offset voltage, careful attention to input bias current cancella-
tion is also required. The high-speed input stage for the
OPA843 has a relatively high input bias current (20µA typical
into the pins) but with a very close match between the two
input currentstypically 0.17µA input offset current. Figures
13 and 14 show typical distribution of input offset voltage and
current for the OPA843.
mV
< 1.20
< 1.08
Count
1000
900
800
700
600
500
400
300
200
100
0
< 0.96
< 0.84
< 0.72
< 0.60
< 0.48
< 0.36
< 0.24
< 0.12
< 0.00
<0.12
<0.24
<0.36
<0.48
<0.60
<0.72
<0.84
<0.96
<1.08
<1.20
>1.20
Mean = 0.38mV
Standard Deviation = 0.31mV
Total Count = 5572
FIGURE 13. Input Offset Voltage Distributing in mV.
FIGURE 12. Op Amp Noise Analysis Model.
4kT
R
G
R
G
R
F
R
S
OPA843
I
BI
E
O
I
BN
4kT = 1.6E 20J
at 290°K
E
RS
E
NI
4kTR
S
4kTR
F